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參數(shù)資料
| 型號： | AD9744ARURL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 14-Bit, 165 MSPS TxDAC D/A Converter |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.011 us SETTLING TIME, 14-BIT DAC, PDSO28 |
| 封裝： | MO-153AE, TSSOP-28 |
| 文件頁數(shù)： | 2/28頁 |
| 文件大?。?/td> | 1142K |
| 代理商： | AD9744ARURL7 |
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REV. A
–2–
AD9744–SPECIFICATIONS
DC SPECIFICATIONS
(T
MIN
to T
MAX
, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V, I
OUTFS
= 20 mA, unless otherwise noted.)
Parameter
Min
Typ
Max
Unit
RESOLUTION
DC ACCURACY
1
Integral Linearity Error (INL)
Differential Nonlinearity (DNL)
14
Bits
–5
–3
±
0.8
±
0.5
+5
+3
LSB
LSB
ANALOG OUTPUT
Offset Error
Gain Error (Without Internal Reference)
Gain Error (With Internal Reference)
Full-Scale Output Current
2
Output Compliance Range
Output Resistance
Output Capacitance
–0.02
–0.5
–0.5
2
–1
+0.02
+0.5
+0.5
20
+1.25
% of FSR
% of FSR
% of FSR
mA
V
k
W
pF
±
0.1
±
0.1
100
5
REFERENCE OUTPUT
Reference Voltage
Reference Output Current
3
1.14
1.20
100
1.26
V
nA
REFERENCE INPUT
Input Compliance Range
Reference Input Resistance (Ext. Reference)
Small Signal Bandwidth
0.1
1.25
V
M
W
MHz
1
0.5
TEMPERATURE COEFFICIENTS
Offset Drift
Gain Drift (Without Internal Reference)
Gain Drift (With Internal Reference)
Reference Voltage Drift
0
±
50
±
100
±
50
ppm of FSR/
∞
C
ppm of FSR/
∞
C
ppm of FSR/
∞
C
ppm/
∞
C
POWER SUPPLY
Supply Voltages
AVDD
DVDD
CLKVDD
Analog Supply Current (I
AVDD
)
Digital Supply Current (I
DVDD
)
4
Clock Supply Current (I
CLKVDD
)
Supply Current Sleep Mode (I
AVDD
)
Power Dissipation
4
Power Dissipation
5
Power Supply Rejection Ratio—AVDD
6
Power Supply Rejection Ratio—DVDD
6
2.7
2.7
2.7
3.3
3.3
3.3
33
8
5
5
135
145
3.6
3.6
3.6
36
9
6
6
145
V
V
V
mA
mA
mA
mA
mW
mW
% of FSR/V
% of FSR/V
∞
C
–1
–0.04
+1
+0.04
OPERATING RANGE
–40
+85
NOTES
1
Measured at IOUTA, driving a virtual ground.
2
Nominal full-scale current, I
, is 32 times the I
current.
3
An external buffer amplifier with input bias current <100 nA should be used to drive any external load.
4
Measured at f
= 25 MSPS and f
= 1 MHz.
5
Measured as unbuffered voltage output with I
OUTFS
= 20 mA and 50
W
R
LOAD
at IOUTA and IOUTB, f
CLOCK
= 100 MSPS and f
OUT
= 40 MHz.
6
±
5% power supply variation.
Specifications subject to change without notice.
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