參數(shù)資料
型號(hào)： AD9713BAP
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： 12-Bit, 100 MSPS D/A Converters
中文描述： PARALLEL, WORD INPUT LOADING, 0.027 us SETTLING TIME, 12-BIT DAC, PQCC28
封裝： PLASTIC, LCC-28
文件頁數(shù)： 3/12頁
文件大?。?/td> 329K
代理商： AD9713BAP
AD9712B
All Grades
T yp
AD9713B
All Grades
T yp
T est
Level
Parameter (Conditions)
T emp
Min
Max
Min
Max
Units
POWER SUPPLY
13
Positive Supply Current (+5.0 V)
+25
°
C
Full
+25
°
C
Full
+25
°
C
+25
°
C
I
VI
I
VI
V
I
6
12
14
184
188
mA
mA
mA
mA
mW
μ
A/V
Negative Supply Current (–5.2 V)
14
140
178
183
145
Nominal Power Dissipation
Power Supply Rejection Radio (PSRR)
15
728
30
784
30
100
100
NOT ES
Measured as error in ratio of full-scale current to current through R
(160
μ
A nominal); ratio is nominally 128.
2
Full-scale variations among devices are higher when driving REFERENCE INPUT directly.
3
Frequency at which the gain is flat
±
0.5 dB; R
= 50
; 50% modulation at midscale.
4
Based on I
= 128 (V
/R
) when using internal amplifier.
5
Data registered into DAC accurately at this rate; does not imply settling to 12-bit accuracy.
6
Measured as voltage settling at midscale transition to
±
0.024%, R
= 50
.
7
Measured as the time between the 50% point of the falling edge of LAT CH ENABLE and the point where the output signal has left a 1 LSB error band
around its previous value.
8
Peak glitch impulse is measured as the largest area under a single positive or negative transient.
9
Measured with R
= 50
and DAC operating in latched mode.
10
Data must remain stable for specified time prior to falling edge of LAT CH ENABLE signal.
11
Data must remain stable for specified time after rising edge of LAT CH ENABLE signal.
12
SFDR is defined as the difference in signal energy between the fundamental and worst case spurious frequencies in the output spectrum window, which is
centered at the fundamental frequency and covers the indicated span.
13
Supply voltages should remain stable within
±
5% for normal operation.
14
108 mA typ on Digital –V
, 37 mA typ on Analog –V
.
15
Measured at
±
5% of +V
S
(AD9713B only) and –V
S
(AD9712B or AD9713B) using external reference.
Specifications subject to change without notice.
ORDE RING GUIDE
T emperature
Range
Package
Description
Package
Option
Model
AD9712BAN
AD9712BBN
AD9712BAP
AD9712BBP
AD9712BSQ/883B
AD9712BSE/883B
AD9712BT Q/883B
AD9712BT E/883B
–25
°
C to +85
°
C
–25
°
C to +85
°
C
–25
°
C to +85
°
C
–25
°
C to +85
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
–25
°
C to +85
°
C
–25
°
C to +85
°
C
–25
°
C to +85
°
C
–25
°
C to +85
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
28-Pin PDIP
28-Pin PDIP
28-Pin PLCC
28-Pin PLCC
28-Pin Cerdip
28-Pin LCC
28-Pin Cerdip
28-Pin LCC
N-28
N-28
P-28A
P-28A
Q-28
E-28A
Q-28
E-28A
AD9713BAN
AD9713BBN
AD9713BAP
AD9713BBP
AD9713BSQ/883B
AD9713BSE/883B
AD9713BT Q/883B
AD9713BT E/883B
28-Pin PDIP
28-Pin PDIP
28-Pin PLCC
28-Pin PLCC
28-Pin Cerdip
28-Pin LCC
28-Pin Cerdip
28-Pin LCC
N-28
N-28
P-28A
P-28A
Q-28
E-28A
Q-28
E-28A
E X PLANAT ION OF T E ST LE VE LS
T est Level
I
–
100% production tested.
II
–
100% production tested at +25
°
C, and sample tested at
specified temperatures.
III –
Sample tested only.
IV –
Parameter is guaranteed by design and characterization
testing.
V
–
Parameter is a typical value only.
VI –
All devices are 100% tested at +25
°
C. 100% production
tested at temperature extremes for extended tempera-
ture devices; sample tested at temperature extremes for
commercial/industrial devices.
ABSOLUT E MAX IMUM RAT INGS
1
Positive Supply Voltage (+V
S
) (AD9713B Only) . . . . . . . +6 V
Negative Supply Voltage (–V
S
) . . . . . . . . . . . . . . . . . . . . . –7 V
Analog-to-Digital Ground Voltage Differential . . . . . . . . 0.5 V
Digital Input Voltages (D
1
–D
12
, LAT CH ENABLE)
AD9712B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to –V
S
AD9713B . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.5 V to +V
S
Internal Reference Output Current . . . . . . . . . . . . . . . . 500
μ
A
Control Amplifier Input Voltage Range . . . . . . . . . 0 V to –4 V
Control Amplifier Output Current . . . . . . . . . . . . . . .
±
2.5 mA
Reference Input Voltage Range (V
REF
) . . . . . . . . . . . 0 V to –V
S
Analog Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating T emperature Range
AD9712B/AD9713BAN/AP/BN/BP . . . . . . .–25
°
C to +85
°
C
AD9712B/AD9713BSE/SQ/T E/T Q . . . . . . –55
°
C to +125
°
C
Maximum Junction T emperature
2
AD9712B/AD9713BAN/AP/BN/BP . . . . . . . . . . . . . +150
°
C
AD9712B/AD9713BSE/SQ/T E/T Q . . . . . . . . . . . . . +175
°
C
Lead T emperature (Soldering, 10 sec) . . . . . . . . . . . . . +300
°
C
Storage T emperature Range . . . . . . . . . . . . .–65
°
C to +150
°
C
NOT ES
1
Absolute maximum ratings are limiting values to be applied individually, and
beyond which the serviceability of the circuit may be impaired. Functional
operability is not necessarily implied. Exposure to absolute maximum rating
conditions for an extended period of time may affect device reliability.
2
T ypical thermal impedances with parts soldered in place: 28-pin plastic DIP:
θ
JA
= 37
°
C/W,
θ
JC
= 10
°
C/W; 28-pin PLCC:
θ
JA
= 44
°
C/W,
θ
JC
= 14
°
C/W;
Cerdip:
θ
JA
= 32
°
C/W,
θ
JC
= 10
°
C/W; LCC:
θ
JA
= 41
°
C/W,
θ
JC
= 13
°
C/W. No air
flow.
AD9712B/AD9713B
REV. B
–3–
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