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參數資料
| 型號： | AD9707BCPZRL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 33/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC TX 14BIT 175MSPS 32-LFCSP |
| 產品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 1,500 |
| 系列： | TxDAC® |
| 設置時間： | 11ns |
| 位數： | 14 |
| 數據接口： | 串行 |
| 轉換器數目： | 1 |
| 電壓電源： | 模擬和數字 |
| 功率耗散（最大）： | 50mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 帶卷 (TR) |
| 輸出數目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 175M |
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Data Sheet
AD9704/AD9705/AD9706/AD9707
Rev. B | Page 39 of 44
and writing of the calibration coefficients. There are 33 coefficients
in total. The read/write feature of the coefficients can be useful
for improving the results of the self-calibration routine by averaging
the results of several calibration results and loading the averaged
results back into the device. The reading and writing routines
follow.
To read the calibration coefficients to the device:
1.
Enable the calibration clock by setting the CALCLK bit
(Register 0x02, Bit 0).
2.
Write the address of the first coefficient (0x00) to
Register 0x10.
3.
Set the SMEMRD bit (Register 0x0F, Bit 2) by writing 0x04
to Register 0x0F.
4.
Wait at least 160 CLK+/CLK clock cycles.
5.
Read the value of the first coefficient by reading the
contents of Register 0x11.
6.
Clear the SMEMRD bit by writing 0x00 to Register 0x0F.
7.
Repeat Step 2 through Step 6 for each of the remaining 32
coefficients by incrementing the address by one for each
read.
8.
Disable the calibration clock by clearing the CALCLK Bit
(Register 0x02, Bit 0).
To write the calibration coefficients to the device:
1.
Enable the calibration clock by setting the CALCLK bit
(Register 0x02, Bit 0).
2.
Set the SMEMWR bit (Register 0x0F, Bit 3) by writing 0x08
to Register 0x0F.
3.
Write the address of the first coefficient (0x00) to
Register 0x10.
4.
Write the value of the first coefficient to Register 0x11.
5.
Wait at least 160 CLK+/CLK clock cycles
6.
Repeat Step 3 through Step 5 for each of the remaining 32
coefficients by incrementing the address by one for each write.
7.
Clear the SMEMWR bit by writing 0x00 to Register 0x0F.
8.
Disable the calibration clock by clearing the CALCLK bit
(Register 0x02, Bit 0).
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9707-DPG2-EBZ | 功能描述:BOARD EVAL FOR AD9707 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數模轉換器 (DAC) 系列:* 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數量:4 位數:12 采樣率（每秒）:- 數據接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9707-EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-/10-/12-/14-Bit, 175 MSPS TxDAC D/A Converters |
| AD9707-EBZ | 制造商:Analog Devices 功能描述:Evaluation Board For AD9707 DigitalToAnalog Converters 8/10/12/14Bit, 175 MSPS TxDAC |
| AD9708 | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-Bit, 100 MSPS TxDAC D/A Converter |
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