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參數(shù)資料
| 型號(hào)： | AD9631ARZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP VF ULDIST 70MA 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 放大器類型： | 電壓反饋 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 1300 V/µs |
| -3db帶寬： | 320MHz |
| 電流 - 輸入偏壓： | 2µA |
| 電壓 - 輸入偏移： | 3000µV |
| 電流 - 電源： | 17mA |
| 電流 - 輸出 / 通道： | 70mA |
| 電壓 - 電源，單路/雙路(±)： | 6 V ~ 12 V，±3 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
AD9631/AD9632
Data Sheet
Rev. D | Page 16 of 20
PULSE RESPONSE
Unlike a traditional voltage feedback amplifier, where the slew
speed is dictated by its front end dc quiescent current and gain
current that increases proportionally to the input step signal
amplitude. This results in slew rates (1300 V/s) comparable
to wideband current feedback designs. This, combined with
relatively low input noise current (2.0 pA/√Hz), gives the
current feedback amplifiers.
LARGE SIGNAL PERFORMANCE
The outstanding large signal operation of the AD9631 and
AD9632 is due to a unique, proprietary design architecture. To
maintain this level of performance, the maximum 550 V × MHz
product must be observed (for example, @ 100 MHz, VOUT ≤
5.5 V p-p).
POWER SUPPLY BYPASSING
Adequate power supply bypassing can be critical when optimiz-
ing the performance of a high frequency circuit. Inductance in
the power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, then bypass capacitors
(typically greater than 1 F) will be required to provide the best
settling time and lowest distortion. A parallel combination of at
least 4.7 F, and between 0.1 F and 0.01 F, is recommended.
Some brands of electrolytic capacitors will require a small series
damping resistor ≈4.7 for optimum results.
DRIVING CAPACITIVE LOADS
reactive loads. If driving loads with a capacitive component is
desired, the best frequency response is obtained by the addition
of a small series resistance as shown in Figure 62. Figure 63
shows the optimum value for RSERIES vs. capacitive load. It is
worth noting that the frequency response of the circuit when
driving large capacitive loads will be dominated by the passive
roll-off of RSERIES and CL.
Figure 62. Driving Capacitive Loads
Figure 63. Recommended RSERIES vs. Capacitive Load
RF
RSERIES
RIN
CL
RL
1kΩ
AD9631/
AD9632
00601-
062
40
30
20
10
0
10
20
5
15
25
R
SER
IES
(Ω)
CL (pF)
00601-
063
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| AD9631CHIPS | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultralow Distortion, Wide Bandwidth Voltage Feedback Op Amps |
| AD9631-EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultralow Distortion, Wide Bandwidth Voltage Feedback Op Amps |
| AD9631SMD | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultralow Distortion, Wide Bandwidth Voltage Feedback Op Amps |
| AD9632 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultralow Distortion, Wide Bandwidth Voltage Feedback Op Amps |
| AD9632AN | 制造商:Analog Devices 功能描述:OP Amp Single Volt Fdbk 制造商:Rochester Electronics LLC 功能描述:WIDE BW, GAIN=2 OP AMP - Bulk |
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