參數(shù)資料
型號(hào): AD9522-5/PCBZ
廠(chǎng)商: Analog Devices Inc
文件頁(yè)數(shù): 72/76頁(yè)
文件大小: 0K
描述: BOARD EVALUATION FOR AD9522-5
設(shè)計(jì)資源: AD9522 Eval Board Schematic
AD9522 BOM
標(biāo)準(zhǔn)包裝: 1
主要目的: 計(jì)時(shí),時(shí)鐘發(fā)生器
嵌入式:
已用 IC / 零件: AD9522-5
主要屬性: 12 LVDS/24 CMOS 輸出
次要屬性: I²C & SPI 接口
已供物品:
AD9522-5
Rev. 0 | Page 74 of 76
CMOS CLOCK DISTRIBUTION
The output drivers of the AD9522 can be configured as CMOS
drivers. When selected as a CMOS driver, each output becomes
a pair of CMOS outputs, each of which can be individually
turned on or off and set as inverting or noninverting. These
outputs are 3.3 V CMOS compatible.
When single-ended CMOS clocking is used, some of the
following guidelines apply.
Point-to-point connections should be designed such that each
driver has only one receiver, if possible. Connecting outputs in
this manner allows for simple termination schemes and minimizes
ringing due to possible mismatched impedances on the output
trace. Series termination at the source is generally required to
provide transmission line matching and/or to reduce current
transients at the driver.
The value of the resistor is dependent on the board design and
timing requirements (typically 10 Ω to 100 Ω is used). CMOS
outputs are also limited in terms of the capacitive load or trace
length that they can drive. Typically, trace lengths less than
3 inches are recommended to preserve signal rise/fall times and
signal integrity.
CMOS
10
60.4
(1.0 INCH)
MICROSTRIP
07
24
0-
07
6
Figure 59. Series Termination of CMOS Output
Termination at the far end of the PCB trace is a second option.
The CMOS outputs of the AD9522 do not supply enough current
to provide a full voltage swing with a low impedance resistive, far-
end termination, as shown in Figure 60. The far-end termination
network should match the PCB trace impedance and provide the
desired switching point. The reduced signal swing may still meet
receiver input requirements in some applications. This can be
useful when driving long trace lengths on less critical nets.
CMOS
10
50
100
VS
0
72
40
-0
77
Figure 60. CMOS Output with Far-End Termination
Because of the limitations of single-ended CMOS clocking,
consider using differential outputs when driving high speed
signals over long traces. The AD9522 offers LVDS outputs that
are better suited for driving long traces where the inherent noise
immunity of differential signaling provides superior performance
for clocking converters.
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