參數(shù)資料
型號： AD9515/PCBZ
廠商： Analog Devices Inc
文件頁數(shù)： 14/28頁
文件大?。?/td> 0K
描述： BOARD EVAL CLOCK 2CH AD9515
設(shè)計資源： Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
AD9513/14/15 Eval Brd Schematics
AD9513/14/15 Gerber Files
AD9515 Eval Brd BOM
標(biāo)準(zhǔn)包裝： 1
主要目的： 計時，時鐘分配
已用 IC / 零件： AD9515
已供物品： 板
相關(guān)產(chǎn)品： AD9515BCPZ-ND - IC CLOCK DIST 2OUT PLL 32LFCSP
AD9515BCPZ-REEL7-ND - IC CLOCK DIST 2OUT PLL 32LFCSP
Data Sheet
AD9515
Rev. A | Page 21 of 28
Table 13. S5, S6, and S7—OUT1
S5
S6
S7
OUT1
Divide (Duty Cycle1)
OUT1
Phase
0
1
0
1/3
0
2 (50%)
0
2/3
0
3 (33%)
0
1
0
4 (50%)
0
1/3
0
5 (40%)
0
1/3
0
6 (50%)
0
2/3
1/3
0
7 (43%)
0
1
1/3
0
8 (50%)
0
2/3
0
9 (44%)
0
1/3
2/3
0
10 (50%)
0
2/3
0
11 (45%)
0
1
2/3
0
12 (50%)
0
1
0
OUT1 OFF
1/3
1
0
14 (50%)
0
2/3
1
0
15 (47%)
0
1
0
16 (50%)
0
1/3
17 (47%)
0
1/3
0
1/3
18 (50%)
0
2/3
0
1/3
19 (47%)
0
1
0
1/3
20 (50%)
0
1/3
21 (48%)
0
1/3
22 (50%)
0
2/3
1/3
23 (48%)
0
1
1/3
24 (50%)
0
2/3
1/3
25 (48%)
0
1/3
2/3
1/3
26 (50%)
0
2/3
1/3
27 (48%)
0
1
2/3
1/3
28 (50%)
0
1
1/3
29 (48%)
0
1/3
1
1/3
30 (50%)
0
2/3
1
1/3
31 (48%)
0
1
1/3
32 (50%)
0
2/3
2 (50%)
1
1/3
0
2/3
4 (50%)
1
2/3
0
2/3
4 (50%)
2
1
0
2/3
4 (50%)
3
0
1/3
2/3
8 (50%)
1
1/3
2/3
8 (50%)
2
2/3
1/3
2/3
8 (50%)
3
1
1/3
2/3
8 (50%)
4
0
2/3
8 (50%)
5
1/3
2/3
8 (50%)
6
2/3
8 (50%)
7
1
2/3
16 (50%)
1
0
1
2/3
16 (50%)
2
1/3
1
2/3
16 (50%)
3
2/3
1
2/3
16 (50%)
4
1
2/3
16 (50%)
5
0
1
16 (50%)
6
S5
S6
S7
OUT1
Divide (Duty Cycle1)
OUT1
Phase
1/3
0
1
16 (50%)
7
2/3
0
1
16 (50%)
8
1
0
1
16 (50%)
9
0
1/3
1
16 (50%)
10
1/3
1
16 (50%)
11
2/3
1/3
1
16 (50%)
12
1
1/3
1
16 (50%)
13
0
2/3
1
16 (50%)
14
1/3
2/3
1
16 (50%)
15
2/3
1
32 (50%)
1
2/3
1
32 (50%)
2
0
1
32 (50%)
3
1/3
1
32 (50%)
4
2/3
1
32 (50%)
5
1
Do not use
1 Duty cycle is the clock signal high time divided by the total period.
Table 14. S8—OUT0/OUT1 Phase (Delay) Select
(Used with S9 to S10)
S8
OUT0
OUT1 (Delay if S0 ≠ 0)
0
No Phase
Phase (Delay)
1/3
Phase
No Phase
2/3
No Phase
Phase (Delay) (Start High)
1
Phase (Start High)
No Phase
Table 15. S9 and S10
OUT0 or OUT1 Phase
(Depends on S8)
OUT1 Delay (S0 ≠ 0)
(Depends on S8)
S9
S10
Phase1
Fine Delay
0
1/3
0
1
1/16
2/3
0
2
1/8
1
0
3
3/16
0
1/3
4
1/4
1/3
5
5/16
2/3
1/3
6
3/8
1
1/3
7
7/16
0
2/3
8
1/2
1/3
2/3
9
9/16
2/3
10
5/8
1
2/3
11
11/16
0
1
12
3/4
1/3
1
13
13/16
2/3
1
14
7/8
1
15
15/16
1 A phase > 0 in Table 12 or overrides the phase in Table 15.
相關(guān)PDF資料
PDF描述
ECC30DCAN CONN EDGECARD 60POS R/A .100 SLD
ECC30DCAH CONN EDGECARD 60POS R/A .100 SLD
AD9510-VCO/PCBZ BOARD EVALUATION FOR AD9510
RBM22DSUI CONN EDGECARD 44POS DIP .156 SLD
A2MXS-2406M ADM24S/AE24M/X
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD95160 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Channel Clock Generator with Integrated 2.8 GHz VCO
AD9516-0 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Output Clock Generator with Integrated 2.8 GHz VCO
AD9516-0/PCBZ 功能描述:IC CLOCK GEN 2.8GHZ VCO 64-LFCSP RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081
AD9516-0_07 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Output Clock Generator with Integrated 2.8 GHz VCO
AD9516-0BCPZ 功能描述:IC CLOCK GEN 2.8GHZ VCO 64-LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR)
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*