- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10518 > AD9433BSVZ-105 (Analog Devices Inc)IC ADC 12BIT 105MSPS 52TQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | AD9433BSVZ-105 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 105MSPS 52TQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 105M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 1.43W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 52-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 52-TQFP-EP（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 2 個(gè)單端，單極；2 個(gè)差分，單極 |
AD9433
Rev. A | Page 14 of 20
TERMINOLOGY
Analog Bandwidth
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between the 50% point of the rising edge of the
ENCODE command and the instant at which the analog input
is sampled.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Differential Analog Input Resistance, Differential Analog
Input Capacitance, and Differential Analog Input Impedance
The real and complex impedances measured at each analog
input port. The resistance is measured statically and the
capacitance and differential input impedances are measured
with a network analyzer.
Differential Analog Input Voltage Range
The peak-to-peak differential voltage that must be applied to
the converter to generate a full-scale response. Peak differential
voltage is computed by observing the voltage on a single pin
and subtracting the voltage from the other pin, which is 180°
out of phase. Peak-to-peak differential voltage is computed by
rotating the input phase 180° and taking the peak measure-
ment again. The difference is then computed between both
peak measurements.
Differential Nonlinearity (DNL)
The deviation of any code width from an ideal 1 LSB step.
Effective Number of Bits (ENOB)
The effective number of bits (ENOB) is calculated from the
measured SNR based on the following equation:
02
.
6
=
ENOB
log
20
dB
76
.
1
+
Amplitude
Input
Amplitude
Scale
Full
SNR
MEASURED
Encode Pulse Width/Duty Cycle
Pulse width high is the minimum amount of time that the
encode pulse should be left in the Logic 1 state to achieve the
rated performance. Pulse width low is the minimum amount
of time that the encode pulse should be left in the Logic 0 state.
At a given clock rate, these specifications define an acceptable
encode duty cycle.
Full-Scale Input Power
Expressed in dBm. Computed using the following equation:
Gain Error
The difference between the measured and the ideal full-scale
input voltage range of the ADC.
Harmonic Distortion
The ratio of the rms signal amplitude fundamental frequency
to the rms signal amplitude of a single harmonic component
(second, third, and so on); reported in dBc.
Integral Nonlinearity (INL)
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a “best straight line”
determined by a least square curve fit.
Maximum Conversion Rate
The maximum encode rate at which parametric testing is
performed.
Minimum Conversion Rate
The encode rate at which the SNR of the lowest analog signal
frequency drops by no more than 3 dB below the guaranteed
limit.
Noise (for Any Range within the ADC)
Noise can be calculated using the following equation:
×
=
10
0.001
dBFS
dBc
dBm
NOISE
Signal
SNR
FS
Z
V
where:
Z
is the input impedance.
FS
is the full scale of the device for the frequency in question.
SNR
is the value for the particular input level.
Signal
is the signal level within the ADC reported in dB below
full scale. This value includes both thermal and quantization
noise.
Output Propagation Delay
The delay between a differential crossing of ENCODE and
ENCODE and the time when all output data bits are within
valid logic levels.
Power Supply Rejection Ratio (PSRR)
The ratio of a change in input offset voltage to a change in
power supply voltage.
Signal-to-Noise and Distortion (SINAD)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, including harmonics but excluding dc.
Signal-to-Noise Ratio (SNR)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral com-
ponents, excluding the first five harmonics and dc.
001
.
0
=
log
10
2
Z
FullScale
V
Power
rms
FullScale
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9432BSVZ-105 | IC ADC 12BIT 105MSPS 52TQFP |
| VE-B0X-MX-F1 | CONVERTER MOD DC/DC 5.2V 75W |
| VE-B4P-IV-F4 | CONVERTER MOD DC/DC 13.8V 150W |
| AD9432BSTZ-105 | IC ADC 12BIT 105MSPS 52-LQFP |
| UP050B681K-A-B | CAP CER 680PF 50V 10% AXIAL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9433BSVZ-125 | 功能描述:IC ADC 12BIT 125MSPS 52-TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極 |
| AD9433PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Speed ADC USB FIFO Evaluation Kit |
| AD9434 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 370 MSPS/500 MSPS, 1.8 V Analog-to-Digital Converter |
| AD9434-370EBZ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 12 Bit 370Msps 1.8V ADC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| AD9434-500EBZ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 12 Bit 500Msps 1.8V ADC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。