參數(shù)資料
型號(hào): AD9272BSVZRL-40
廠商: Analog Devices Inc
文件頁(yè)數(shù): 5/44頁(yè)
文件大?。?/td> 0K
描述: IC ADC ASD OCTAL 40MSPS 100-TQFP
設(shè)計(jì)資源: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
標(biāo)準(zhǔn)包裝: 1,000
類型: AAF,ADC,交叉點(diǎn)開關(guān),LNA,VGA
分辨率(位): 12 b
采樣率(每秒): 40M
數(shù)據(jù)接口: 串行
電壓電源: 模擬和數(shù)字
電源電壓: 1.8V,3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 帶卷 (TR)
配用: AD9272-65EBZ-ND - BOARD EVAL AD9272
AD9272
Rev. C | Page 13 of 44
Pin No.
Name
Description
20
LG-H
LNA Ground for Channel H
23
CLK
Clock Input Complement
24
CLK+
Clock Input True
27
DOUTH
ADC H Digital Output Complement
28
DOUTH+
ADC H Digital Output True
29
DOUTG
ADC G Digital Output Complement
30
DOUTG+
ADC G Digital Output True
31
DOUTF
ADC F Digital Output Complement
32
DOUTF+
ADC F Digital Output True
33
DOUTE
ADC E Digital Output Complement
34
DOUTE+
ADC E Digital Output True
35
DCO
Digital Clock Output Complement
36
DCO+
Digital Clock Output True
37
FCO
Frame Clock Digital Output Complement
38
FCO+
Frame Clock Digital Output True
39
DOUTD
ADC D Digital Output Complement
40
DOUTD+
ADC D Digital Output True
41
DOUTC
ADC C Digital Output Complement
42
DOUTC+
ADC C Digital Output True
43
DOUTB
ADC B Digital Output Complement
44
DOUTB+
ADC B Digital Output True
45
DOUTA
ADC A Digital Output Complement
46
DOUTA+
ADC A Digital Output True
48
STBY
Standby Power-Down
49
PDWN
Full Power-Down
51
SCLK
Serial Clock
52
SDIO
Serial Data Input/Output
53
CSB
Chip Select Bar
56
LG-A
LNA Ground for Channel A
57
LI-A
LNA Analog Input for Channel A
58
LOSW-A
LNA Analog Switched Output for Channel A
59
LO-A
LNA Analog Inverted Output for Channel A
62
LG-B
LNA Ground for Channel B
63
LI-B
LNA Analog Input for Channel B
64
LOSW-B
LNA Analog Switched Output for Channel B
65
LO-B
LNA Analog Inverted Output for Channel B
68
LG-C
LNA Ground for Channel C
69
LI-C
LNA Analog Input for Channel C
70
LOSW-C
LNA Analog Switched Output for Channel C
71
LO-C
LNA Analog Inverted Output for Channel C
74
LG-D
LNA Ground for Channel D
75
LI-D
LNA Analog Input for Channel D
76
LOSW-D
LNA Analog Switched Output for Channel D
77
LO-D
LNA Analog Inverted Output for Channel D
78
CWD0
CW Doppler Output Complement for Channel 0
79
CWD0+
CW Doppler Output True for Channel 0
80
CWD1
CW Doppler Output Complement for Channel 1
81
CWD1+
CW Doppler Output True for Channel 1
82
CWD2
CW Doppler Output Complement for Channel 2
83
CWD2+
CW Doppler Output True for Channel 2
84
CWD3
CW Doppler Output Complement for Channel 3
85
CWD3+
CW Doppler Output True for Channel 3
87
GAIN
Gain Control Voltage Input Complement
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