參數(shù)資料
型號： AD9260ASZRL
廠商： Analog Devices Inc
文件頁數(shù)： 31/44頁
文件大小： 0K
描述： IC ADC 16BIT 2.5MHZ 44MQFP
標準包裝： 800
位數(shù)： 16
采樣率（每秒）： 20M
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 585mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 44-QFP
供應商設備封裝： 44-MQFP（10x10）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 2 個單端，單極；1 個差分，單極
AD9260
Rev. C | Page 37 of 44
Table 18. Evaluation Board Reference Pin Configuration
Reference
Voltage
Connect Jumper
Input Voltage
(p-p FS)
2.5 V
JP7
4.0 V
1.0 V
JP6
1.6 V
External
JP5, JP9, and JP10
4.0 V
The external reference circuitry is illustrated in Figure 77. By
connecting or disconnecting JP10, the external reference can be
configured for either 1.0 V or 2.5 V. By connecting JP10, the
external reference will be configured to provide a 2.5 V
reference and by disconnecting JP10 reference, it will be
configured for 2.5 V. By leaving JP10 open, the external
reference will be configured to provide a 1.0 V reference.
Flexible DC or AC Coupled External Clock Inputs
As illustrated in Figure 78, the AD9260 Evaluation Board is
designed to allow the user the flexibility of selecting how to
connect the external clock source. It is also equipped with a
playpen area for experimenting with optional clock drivers or
crystals.
Selecting DC or AC Coupled External Clock:
DC Coupled: To directly drive the clock externally via the
CLKIN connector, connect JP11 and disconnect JP12. Note:
50 terminated by R27.
AC Coupled: To ac couple the external clock and level shift it to
midsupply, connect JP12 and disconnect JP11. Note: 50
terminated by R27.
Flexible Input Signal Configuration Circuitry
The AD9260 Evaluation Board’s Input Signal Configuration
Block is illustrated in Figure 79. It is comprised of an input
signal summing amplifier (U7), a variable input signal
common-mode generator (U10), and a pair of amplifiers (U8
and U9) that configure the input into a differential signal and
drive it, through a pair of isolation resistors, into the input pins
of AD9260. The user can either input a signal or dual signal into
the evaluation board via the two SMA connectors (J6 and J7)
labeled IN-1 or IN-2.
The user should refer to the Driving the Input section of the
data sheet for a detailed explanation of how the inputs are to be
driven and what amplifier requirements are recommended.
Selecting Single or Dual Signal Input
The input amplifier (U7) can either be configured as a dual
input signal inverting summer or a single tone inverting buffer.
This flexibility will allow for slightly better noise performance
in the single tone mode due to the inherent noise gain
difference in the two amplifier configurations. An optional
feedback capacitor (C9) was added to allow the user additional
out-of band filtering of the input signal if needed.
For two-tone input signals: The user would leave jumpers (JP8)
connected and use IN-1 and IN-2 (J7 and J6) as the connectors
for the input signals.
For signal tone input signal: The user would remove jumper
(JP8) and use only IN-1 as the input signal connector.
Selectable Input Signal Common-Mode Level Source
The input signal’s common-mode level (CML) can be set
by U10.
To use the Input CML generated by U10: Disconnect jumper
JP13 and Connect resistors RX3 and RX4. The CML generated
by U10 is variable and adjustable using the 1 k Variable
Resistor R35.
SHIPMENT CONFIGURATION
The AD9260 Evaluation Board is configured as follows
when shipped:
1.
2.5 V external reference/4.0 V differential full-scale input:
JP5, JP9, and JP10 connected, JP6 and JP7 disconnected.
2.
8× Mode/OSR: JP1 connected, JP2, JP3, and JP4
disconnected.
3.
Full Speed Power Bias: R2 = 2 k and connected.
4.
CSB pulled low: R6 = 49.9 and connected, R29
disconnected.
5.
RESETB pulled high: R7 = 10 k and connected, R30
disconnected.
6.
READ pulled high: R28 = 10 k and connected, R5
disconnected.
7.
Single Tone Input: JP8 removed, input applied via IN-1
(J7).
8.
Input signal common-mode level set by Variable Resistor
R35 to 2.0 V: Jumper JP12 is disconnected and resistors
R×4 and R×3 are connected.
9.
AC-Coupled Clock: JP12 connected and JP11
disconnected. Note: 50 terminated by R27.
QUICK SETUP
1.
Connect the required power supplies to the Evaluation
Board as illustrated in Figure 28:
± 5 VA supplies to P5—Analog Power
+5 VA supply to P4—Analog Power
+5 VD supply to P3—Digital Power
+5 VD supply to P2—Driver Power
2.
Connect a Clock Source to CLKIN (J1):
Note: 50 terminated by R1.
3.
Connect an Input Signal Source to the IN-1 (J7).
4.
Turn on power.
5.
The AD9260 Evaluation Board is now ready for use.
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