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參數(shù)資料
| 型號： | AD9260ASZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT 2.5MHZ 44MQFP |
| 標(biāo)準(zhǔn)包裝： | 800 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 20M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 585mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-MQFP（10x10） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個單端，單極；1 個差分，單極 |
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AD9260
Rev. C | Page 27 of 44
VIN
CC
100pF
CD
100pF
VCML-VIN
50
R
50
CF
R
CF
R
50
VCML-VIN
0.1
F
1.0
F
AD817
AD9260
50
VINA
VINB
CML
CC
100pF
00581-
C
-064
Figure 64. DC-Coupled Differential Driver with Level-Shifting
beyond the input signals passband by adding a shunt capacitor,
CF, across the feedback resistor of each op amp. This will
essentially establish a low-pass filter which reduces the noise
gain to one beyond the filter’s f–3 dB while simultaneously
bandlimiting the input signal to f–3 dB. Note that the pole
established by this filter can also be used as the real pole of an
antialiasing filter. Since the noise contribution of two op amps
from the same product family are typically equal but
uncorrelated, the total output-referred noise of each op amp
will add root-sum square leading to a further 3 dB degradation
in the circuit’s noise performance. Further out-of-band noise
reduction can be realized with the addition of single-ended and
differential capacitors, CS and CD.
The distortion and noise performance of the two op amps
within the signal path are critical in achieving optimum
performance in the AD9260. Low noise op amps capable of
providing greater than 85 dB THD at 1 MHz while swinging
over a 1 V to 3 V range are a rare commodity, yet these parts are
the only ones that should be considered. The AD9632 op amp
was found to provide superb distortion performance in this
circuit due to its ability to maintain excellent distortion
performance over a wide bandwidth while swinging over a 1 V
to 3 V range. Since the AD9632 is gain-of-two or greater stable,
the use of the noise reduction shunt capacitors discussed above
was prohibited, thus degrading its noise performance slightly
(1 dB–2 dB) when compared to the OPA642. Note that the
majority of the AD9260 test and characterization data presented
in this data sheet was taken using the AD9632 op amp in this
dc-coupled driver circuit. This driver circuit is also provided on
the AD9260 evaluation board since the AD8138 was unreleased
at that time.
The outputs of each op amp are ac coupled via a small series
resistor and capacitor (i.e., 50 and 0.1 F) to the respective
inputs of the AD9260. Similar to the dc coupled driver, further
out-of-band noise reduction can be realized with the addition of
100 pF single-ended and differential capacitors, CS and CD. The
lower cutoff frequency of this ac-coupled circuit is determined
by RC and CC in which RC is tied to the common-mode level pin,
CML, of the AD9260 for proper biasing of the inputs. Although
the OPA642 was found to provide the lowest overall noise and
distortion performance (88.8 dB and 96 dB THD @ 100 kHz),
the AD8055, or dual AD8056, suffered only a 0.5 dB to 1.5 dB
degradation in overall performance. It is worth noting that
given the high level of performance attainable by the AD9260,
special consideration must be given to both the quality of the
test equipment and test set-up in its evaluation.
Common-Mode Level
The CML pin is an internal analog bias point used internally by
the AD9260. This pin must be decoupled to analog ground with
at least a 0.1 F capacitor as shown in Figure 65. The dc level of
CML is approximately AVDD/2.5. This voltage should be
buffered if it is to be used for any external biasing.
Note: the common-mode voltage of the input signal applied to
the AD9260 need not be at the exact same level as CML. While
this level is recommended for optimal performance, the
AD9260 is tolerant of a range of input common-mode voltages
around AVDD/2.5.
CML
AD9260
0.1
F
00581-C-065
Figure 65. CML Decoupling
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