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參數(shù)資料
| 型號(hào)： | AD9202 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete 10-Bit, 32 MSPS, 90 mW CMOS A/D Converter(32MSPS,10位A/D轉(zhuǎn)換器) |
| 中文描述： | 完整的10位，32 MSPS的90毫瓦的CMOS A / D轉(zhuǎn)換（32MSPS，10位的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 369K |
| 代理商： | AD9202 |
AD9202
–12–
REV. B
The actual reference voltages used by the internal circuitry of
the AD9202 appear on REFTF and REFBF. For proper opera-
tion, it is necessary to add a capacitor network to decouple these
pins. The REFTF and REFBF should be decoupled for all
internal and external configurations as shown in Figure 17.
AD9202
REFTF
REFBF
0.1
m
F
0.1
m
F
10
m
F
0.1
m
F
Figure 17. Reference Decoupling Network
Note: REFTF = reference top, force
REFBF = reference bottom, force
REFTS = reference top, sense
REFBS = reference bottom, sense
INTERNAL REFERENCE OPERATION
Figures 18, 19 and 20 show example hookups of the AD9202
internal reference in its most common configurations. (Figures
18 and 19 illustrate top/bottom mode while Figure 20 illustrates
center span mode). Figure 29 shows how to connect the AD9202
for 1 V p-p differential operation. Shorting the VREF pin di-
rectly to the REFSENSE pin places the internal reference
amplifier, A1, in unity-gain mode and the resultant reference
output is 1 V. In Figure 18 REFBS is grounded to give an input
range from 0 V to 1 V. These modes can be chosen when the
supply is either +3 V or +5 V. The VREF pin must be bypassed
to AVSS (analog ground) with a 1.0
μ
F tantalum capacitor in
parallel with a low inductance, low ESR, 0.1
μ
F ceramic capacitor.
1V
0V
MODE
AVDD
10k
V
10k
V
10k
V
A/D
CORE
4.2k
TOTAL
REFTS
REFBS
10
m
F
0.1
m
F
REFTF
REFBF
0.1
m
F
AIN
0.1
m
F
AD9202
10k
V
REF
SENSE
VREF
A1
1V
A2
SHA
Figure 18. Internal Reference—1 V p-p Input Span
(Top/Bottom Mode)
Figure 19 shows the single-ended configuration for 2 V p-p
operation. REFSENSE is connected to GND, resulting in a 2 V
reference output.
2V
0V
MODE
AVDD
A2
10k
V
10k
V
10k
V
A/D
CORE
4.2k
TOTAL
REFTS
REFBS
10
m
F
0.1
m
F
REFTF
REFBF
0.1
m
F
AIN
0.1
m
F
AD9202
10k
V
REF
SENSE
VREF
A1
1V
SHA
Figure 19. Internal Reference, 2 V p-p Input Span
(Top/Bottom Mode)
Figure 20 shows the single-ended configuration that gives the
good high frequency dynamic performance (SINAD, SFDR).
To optimize dynamic performance, center the common-mode
voltage of the analog input at approximately 1.5 V. Connect the
shorted REFTS and REFBS inputs to a low impedance 1.5 V
source. In this configuration, the MODE pin is driven to a volt-
age at midsupply (AVDD/2).
Maximum reference drive is 1 mA. An external buffer is re-
quired for heavier loads.
AVDD/2
+1.5V
2V
1V
MODE
10k
V
10k
V
10k
V
A/D
CORE
4.2k
TOTAL
REFTS
REFBS
10
m
F
0.1
m
F
REFTF
REFBF
0.1
m
F
AIN
0.1
m
F
AD9202
10k
V
REF
SENSE
VREF
1V
SHA
A2
A1
Figure 20. Internal Reference 1 V p-p Input Span
(Center Span Mode)
EXTERNAL REFERENCE OPERATION
Using an external reference may provide more flexibility and
improve drift and accuracy. Figures 21 through 23 show ex-
amples of how to use an external reference with the AD9202.
To use an external reference, the user must disable the internal
reference amplifier by connecting the REFSENSE pin to VDD.
The user then has the option of driving the VREF pin, or driv-
ing the REFTS and REFBS pins.
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