參數(shù)資料
型號(hào)： AD9148BBCZRL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 47/72頁(yè)
文件大?。?/td> 0K
描述： IC DAC 16BIT QD 1GSPS 196CSPBGA
標(biāo)準(zhǔn)包裝： 1,500
系列： TxDAC+®
設(shè)置時(shí)間： 20ns
位數(shù)： 16
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 2.22W
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 196-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 196-CSPBGA（12x12）
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 8 電流，單極
采樣率（每秒）： 1G
Data Sheet
AD9148
Rev. B | Page 51 of 72
Table 18. Programmable Inverse Sinc Filter Coefficient Widths and Ranges
Coefficient
Width
Minimum
Maximum
c0 in-phase (real)
3
100b
011b
4
3
c0 quadrature (imaginary)
3
0100b
011b
4
3
c1 in-phase (real)
4
1000b
0111b
8
7
c1 quadrature (imaginary)
4
1000b
0111b
8
7
c2 in-phase (real)
5
10000b
01111b
16
15
c2 quadrature (imaginary)
5
10000b
01111b
16
15
c3 in-phase (real)
7
1000000b
0111111b
64
63
c3 quadrature (imaginary)
7
1000000b
0111111b
64
63
c4 in-phase (real)
10
1000000000b
0111111111b
1024
1023
c4 quadrature (imaginary)
10
1000000000b
0111111111b
1024
1023
The real and imaginary filters are implemented using the
structure described in Figure 62 and Figure 63.
INPUTn
OUTPUTn
z–1
+
c0REAL
c1REAL
c2REAL
c3REAL
c4REAL
c5REAL
+
08910-
061
Figure 62. Real Filter implementation
INPUTn
OUTPUTn
z–1
+
–
c0IMG
c1IMG
c2IMG
c3IMG
c4IMG
c5IMG
+
–
+
–
+
–
+
–
+
08910-
062
Figure 63. Imaginary Filter implementation
The AD9148 evaluation tools provide software that allows for the
processing of the filter coefficients based on the DAC sampling
frequency, the amount of interpolation used (combination of
HB1, HB2, and HB3), and the desired center frequency. This
center frequency is limited to
[0.4 × fDAC + 0.5 × signalBW, 0.4 × fDAC 0.5 × signalBW]
The bandwidth of the inverse sinc filter equals the maximum
allowable signal bandwidth of the interpolation filters (0.8 × fDATA).
When there is no interpolation used, the real filter coefficients
can be fixed at (no imaginary coefficients)
C0 = 2
;
C8 = 2
C1 = 4
;
C7 = 4
C2 = 10
;
C6 = 10
C3 = 35
;
C5 = 35
C4 = 401
INTERPOLATION FILTERS
The transmit path contains three interpolation filters. Each of
the three interpolation filters provides a 2× increase in output
data rate. The filters can be cascaded to provide 2×, 4×, or 8×
interpolation ratios. Each of the half-band filter stages offers a
different combination of bandwidths and operating modes.
The bandwidth of the three half-band filters with respect to the
data rate at the filter input is as follows:
Bandwidth of HB1 = 0.8 × fIN1
Bandwidth of HB2 = 0.5 × fIN2
Bandwidth of HB3 = 0.4 × fIN3
The usable bandwidth is defined as the frequency over which
the filters have a pass-band ripple of less than ±0.001 dB and an
image rejection of greater than +85 dB. As is discussed in the
Half-Band Filter 1 (HB1) section, the image rejection usually sets
the usable bandwidth of the filter, not the pass-band flatness.
The half-band filters operate in several modes, providing
programmable pass-band center frequencies as well as signal
modulation. The HB1 filter has four modes of operation, and
the HB2 and HB3 filters each have eight modes of operation.
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