參數(shù)資料
型號: AD9058AKD
廠商: Analog Devices Inc
文件頁數(shù): 5/11頁
文件大小: 0K
描述: IC ADC 8BIT DUAL 50MSPS 48-CDIP
標(biāo)準(zhǔn)包裝: 7
位數(shù): 8
采樣率(每秒): 50M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 960mW
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 48-CDIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 48-CDIP 側(cè)面銅焊焊接蓋
包裝: 管件
輸入數(shù)目和類型: 2 個(gè)單端,單極;2 個(gè)單端,雙極
REV.
–3–
AD9058
Test
AD9058AJD/AJJ
AD9058AKD/AKJ
Parameter
Temp
Level
Min
Typ
Max
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Transient Response
25
°CV
2
ns
Overvoltage Recovery Time
25
°CV
2
ns
Effective Number of Bits (ENOB)
3
Analog Input @ 2.3 MHz
25
°C
I
7.7
7.2
7.7
Bits
@ 10.3 MHz
25
°C
I
7.4
7.1
7.4
Bits
Signal-to-Noise Ratio
3
Analog Input @ 2.3 MHz
25
°C
I
48
45
48
dB
@ 10.3 MHz
25
°C
I
46
44
46
dB
Signal-to-Noise Ratio
3 (Without Harmonics)
Analog Input @ 2.3 MHz
25
°C
I
48
46
48
dB
@ 10.3 MHz
25
°C
I
47
45
47
dB
Second Harmonic Distortion
Analog Input @ 2.3 MHz
25
°C
I
58
48
58
dBc
@ 10.3 MHz
25
°C
I
58
48
58
dBc
Third Harmonic Distortion
Analog Input @ 2.3 MHz
25
°C
I
58
50
58
dBc
@ 10.3 MHz
25
°C
I
58
50
58
dBc
Crosstalk Rejection
4
25
°C
IV
60
48
60
dBc
DIGITAL OUTPUTS
Logic “1” Voltage (IOH = 2 mA)
Full
VI
2.4
V
Logic “0” Voltage (IOL = 2 mA)
Full
VI
0.4
V
POWER SUPPLY
5
+VS Supply Current
Full
VI
127
154
127
154
mA
–VS Supply Current
Full
VI
27
38
27
38
mA
Power Dissipation
Full
VI
770
960
770
960
mW
NOTES
1For applications in which +V
S may be applied before –VS, or +VS current is not limited to 500 mA, a reverse-biased clamping diode should be inserted between
ground and –VS to prevent destructive latch up. See section entitled “Using the AD9058.”
2To achieve guaranteed conversion rate, connect each data output to ground through a 2 k
Ω pull-down resistor.
3SNR performance limits for the 48-lead DIP “D” package are 1 dB less than shown. ENOB limits are degraded by 0.3 dB. SNR and ENOB measured with
analog input signal 1 dB below full scale at specified frequency.
4Crosstalk rejection measured with full-scale signals of different frequencies (2.3 MHz and 3.5 MHz) applied to each channel. With both signals synchronously
encoded at 40 MSPS, isolation of the undesired frequency is measured with an FFT.
5Applies to both A/Ss and includes internal ladder dissipation.
Specifications subject to change without notice.
E
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