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參數(shù)資料
| 型號(hào)： | AD8632ARMZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 2/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP GP R-R 5MHZ DUAL 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 2 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 3 V/µs |
| 增益帶寬積： | 5MHz |
| 電流 - 輸入偏壓： | 250nA |
| 電壓 - 輸入偏移： | 800µV |
| 電流 - 電源： | 300µA |
| 電流 - 輸出 / 通道： | 10mA |
| 電壓 - 電源，單路/雙路(±)： | 1.8 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD8632ARMZ-REELDKR |
AD8631/AD8632
–10–
REV. 0
DRIVING CAPACITIVE LOADS
Capacitive Load vs. Gain
Most amplifiers have difficulty driving capacitance due to degra-
dation of phase margin caused by additional phase lag from the
capacitive load. Higher capacitance at the output can increase the
amount of overshoot and ringing in the amplifier’s step response
and could even affect the stability of the device. The value of
capacitive load that an amplifier can drive before oscillation varies
with gain, supply voltage, input signal, temperature, among oth-
ers. Unity gain is the most challenging configuration for driving
capacitive load. However, the AD8631 offers reasonably good
capacitive driving ability. Figure 22 shows the AD8631’s ability to
drive capacitive loads at different gains before instability occurs.
This graph is good for all VSY.
GAIN – V/V
1M
10
2
CAPACITIVE
LOAD
–
pF
46
8
10k
1k
100
9
35
7
1
UNSTABLE
STABLE
100k
Figure 22. Capacitive Load vs. Gain
In-the-Loop Compensation Technique for Driving
Capacitive Loads
When driving capacitance in low gain configuration, the in-the-loop
compensation technique is recommended to avoid oscillation as is
illustrated in Figure 23.
RF + RG
CF =1 +
ACL
1
RF
CLRO
[
RX =
RO RG
RF
WHERE RO = OPEN-LOOP OUTPUT RESISTANCE
AD8631
VIN
VOUT
RX
CL
CF
RF
RG
Figure 23. In-the-Loop Compensation Technique for
Driving Capacitive Loads
Snubber Network Compensation for Driving Capacitive Loads
As load capacitance increases, the overshoot and settling time
will increase and the unity gain bandwidth of the device will
decrease. Figure 24 shows an example of the AD8631 in a non-
inverting configuration driving a 10 k
resistor and a 600 pF
capacitor placed in parallel, with a square wave input set to a
frequency of 90 kHz and unity gain.
VOLTAGE
–
200mV/DIV
TIME – 2 s/DIV
90kHz INPUT SIGNAL
AV = 1
C = 600pF
Figure 24. Driving Capacitive Loads without Compensation
By connecting a series R–C from the output of the device to
ground, known as the “snubber” network, this ringing and over-
shoot can be significantly reduced. Figure 25 shows the network
setup, and Figure 26 shows the improvement of the output
response with the “snubber” network added.
AD8631
VIN
VOUT
5V
RX
CX
CL
Figure 25. Snubber Network Compensation for Capacitive
Loads
VOLTAGE
–
200mV/DIV
TIME – 2 s/DIV
90kHz INPUT SIGNAL
AV = 1
C = 600pF
Figure 26. Photo of a Square Wave with the Snubber
Network Compensation
The network operates in parallel with the load capacitor, CL,
and provides compensation for the added phase lag. The actual
values of the network resistor and capacitor have to be empirically
determined. Table II shows some values of snubber network for
large capacitance load.
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