參數(shù)資料
型號(hào): AD8375ACPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 13/24頁
文件大?。?/td> 0K
描述: IC AMP VGA DIFF ULDIST 24LFCSP
產(chǎn)品培訓(xùn)模塊: Differential Circuit Design Techniques for Communication Applications
標(biāo)準(zhǔn)包裝: 1
放大器類型: 可變?cè)鲆?br>
電路數(shù): 1
輸出類型: 差分
轉(zhuǎn)換速率: 5000 V/µs
-3db帶寬: 630MHz
電流 - 輸入偏壓: 900nA
電流 - 電源: 125mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 775 (CN2011-ZH PDF)
其它名稱: AD8375ACPZ-R7DKR
AD8375
Data Sheet
Rev. A | Page 20 of 24
Table 6. Evaluation Board Configuration Options
Components
Function
Default Conditions
C13, C14, C20,
C63, C64, R91
Power Supply Decoupling. Nominal supply decoupling consists a 10 F
capacitor to ground followed by 0.1 F capacitors to ground positioned as
close to the device as possible.
C20 = 10 F (size 3528)
C13, C14, C63, C64 = 0.1 F
(size 0402)
R91 = 0 (size 0402)
T1, C1, C2, C60,
R1, R2, R9, R10,
R70 to R72
Input Interface. T1 is a 3:1 impedance ratio balun to transform a 50 Ω single-
ended input into a 150 Ω balanced differential signal. R2 grounds one side of
the differential drive interface for single-ended applications. R9, R10, and R70
to R72 are provided for generic placement of matching components. C1 and
C2 are dc blocks.
T1 = TC3-1+ (Mini-Circuits)
C1, C2, C60 = 0.1 F (size 0402)
R2, R9, R10 = 0 (size 0402)
R1, R70 to R72 = open (size 0402)
T3, C7, C8, C62
L1, L2, R15, R16,
R19, R20, R23 to R25,
R29, R30, R62
Output Interface. C7 and C8 are dc blocks. L1 and L2 provide dc biases for the
output. R19, R20, and R23 to R25 are provided for generic placement of
matching components. The evaluation board is configured to provide a 150 Ω
to 50 Ω impedance transformation with an insertion loss of about 11 dB. T3 is a
1:1 impedance ratio balun to transform the balanced differential signal to a
single-ended signal. R30 grounds one side of the differential output interface
for single-ended applications.
T3 = ETC1-1-13 (M/A-COM)
C7, C8, C62 = 0.1 F (size 0402)
L1, L2 = 1 H (size 0805)
R19, R20 = 61.9 (size 0402)
R23, R25 = 30.9 (size 0402)
R15, R16 = 0 (size 0603)
R30 = 0 (size 0402)
R24, R29, R62 = open (size 0402)
PU, R13, C5
Enable Interface. The AD8375 is enabled by applying a logic high voltage to
the PWUP pin. The device is disabled when the PU switch is set in the position
closest to the PU label, connecting the PWUP pin to ground. The device is
enabled when the PU switch is set in the opposite position, connecting the
PWUP to VPOS.
PU = installed
R13 = 0 (size 0603)
C5 = open (size 0603)
WA0 to WA4
Parallel Interface Control. Used to hardwire A0 through A4 to the desired gain.
The bank of switches, WA4 to WA0, set the binary gain code. WA4 represents
the LSB. WA0 represents the MSB.
WA0 to WA4 = installed
C11
Voltage Reference. Input common-mode voltage ac-coupled to ground by
0.1 F capacitor, C11.
C11 = 0.1 F (size 0402)
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