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參數(shù)資料
| 型號(hào)： | AD8156ABCZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 6/20頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH XPT 4X4 W/EQ 49CSPBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | XStream™ |
| 應(yīng)用： | 4 x 4 交叉點(diǎn)開(kāi)關(guān) |
| 接口： | LVTTL，LVCMOS |
| 電源電壓： | 3 V ~ 3.6 V |
| 封裝/外殼： | 49-BGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 49-CSPBGA（8x8） |
| 包裝： | 管件 |
| 安裝類(lèi)型： | 表面貼裝 |
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AD8156
Rev. 0 | Page 14 of 20
When in dual 2 × 2 mode, the A[3:0] and D[3:0] pins set the
AD8156 configuration state when CS is low. This configuration
method allows the user to have multiple AD8156s share the control
bus while each device has its own dedicated CS control signal.
EQ
AD8156
IN0P/N
IN1P/N
IN2P/N
IN3P/N
VCC
MODE
OUT0P/N
OUT1P/N
OUT2P/N
OUT3P/N
EQ
OUTPUT
DRIVERS
INPUT
RECEIVERS
INPUT
EQUALIZATION
2 × 2
SWITCH
2 × 2
SWITCH
0
63
05-
00
8
Figure 24. AD8156 in Dual 2 × 2 Mode
INPUT EQUALIZATION
The AD8156 input equalization is an active scheme that is fully
linear over all operating ranges. The useful range of equalization
covers dc to 3.125 GHz frequencies or dc to 6.25 Gbps data
rates. Other key features include:
15 steps of gain, linear in dB, programmable through the
4 × 4 control interface
Gain has a 40 dB per decade slope
Peak gain of 23 dB at 3.125 GHz (~6.25 Gbps)
Equalizes more than 40” of typical FR4 backplane with
associated connectors and vias at all speeds
0.10 UI p-p residual deterministic jitter typ @ 3.125 Gbps
0.15 UI p-p residual deterministic jitter typ @ 6.25 Gbps
As with all equalizers, the gain setting is the key. The ideal
method of choosing the proper gain setting is to run the equalizer
with the channel, and choose the setting with minimum jitter.
If this process is not possible or is too time consuming for the
number of channels required, the loss of the channel at
3.125 GHz should be measured. The best equalizer setting is
usually 2 dB to 4 dB more than the loss at 3.125 GHz. Using the
40 dB slope of the equalizer gain, the gain at other frequencies
can be calculated based on the peak gain at 3.125 GHz. The
formula to use is
GHz
83
.
0
log
40
15
)
(
10
f
D[3:0]
f
gain
×
=
where f is the fundamental frequency of the data, or the data
rate divided by 2 (that is, 6.25 Gbps → f = 3.125 GHz).
Performance of the equalizer is heavily dependent on the channel
used. Operation at high speeds depends on features such as
dielectric used (for example, FR4, Nelco3000, or Rogers), connector
quality, via stub length, and routing geometry and topology.
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD8156-EVALZ | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:6.25 Gbps 4】4 Digital Crosspoint Switch with EQ |
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| AD8158ACPZ | 功能描述:IC MUX/DEMUX QUAD 2X1 100LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 模擬開(kāi)關(guān)，多路復(fù)用器，多路分解器 系列:XStream™ 應(yīng)用說(shuō)明:Ultrasound Imaging Systems Application Note 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- 功能:開(kāi)關(guān) 電路:單刀單擲 導(dǎo)通狀態(tài)電阻:48 歐姆 電壓電源:單電源 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電流 - 電源:5µA 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:托盤(pán) |
| AD8158-EVALZ | 制造商:Analog Devices 功能描述:EVALUATION BOARD - Bulk |
| AD8158XCPZ | 制造商:Analog Devices 功能描述:QUAD-LANE 6.5GBPS 2:1 MUX / 1:2 DEMUX SWITCH 100-PIN LFCSP - Bulk |
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