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參數(shù)資料
| 型號： | AD8128ACPZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RECEIVER LINE EQUAL 8LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 類型： | 接收器 |
| 驅(qū)動器/接收器數(shù)： | 0/1 |
| 規(guī)程： | 以太網(wǎng) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-VFDFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 8-LFCSP-VD（3x3） |
| 包裝： | 帶卷 (TR) |
AD8128
Rev. 0 | Page 7 of 12
1.5
–1.5
0
200
05
69
9
-00
9
TIME (ns)
OU
T
P
U
T
(
V
)
1.0
0.5
0
–0.5
–1.0
20
40
60
80
100
120
140
160
180
VPEAK AND VGAIN SETTINGS ARE
CONSISTENT WITH OPTIMIZED
SETTINGS IN FIGURE 4
Figure 10. Equalized Pulse Response for 100 M of Cable
40
–40
–4
4
0
5699
-0
08
VIN, CM (V)
V
OU
T
(m
V)
30
20
10
0
–10
–20
–30
–3
–2
–1
0
1
2
3
Figure 11. Output Voltage vs. Common-Mode Input Voltage
100
10
0.1
1k
05
69
9
-00
7
FREQUENCY (MHz)
VOL
TA
G
E
N
O
ISE
(n
V/
H
z)
1
10
100
VPEAK =0V
VGAIN =0V
VPEAK =0.9V
VGAIN = 0.225V
Figure 12. Voltage Noise vs. Frequency
1.8
0
1.0
056
99-
0
06
VPEAK (V)
IN
TE
G
R
A
T
E
D
V
O
L
TA
G
E
N
O
IS
E
F
R
O
M
100k
H
z
T
O
1G
H
z(
m
V
)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
VGAIN SETTINGS ARE CONSISTENT
WITH OPTIMIZED SETTINGS IN FIGURE 4
Figure 13. Integrated Voltage Noise vs. VPEAK
6
–6
0
500
05
69
9
-00
5
TIME (ns)
VOL
TA
G
E
(V)
4
2
0
–2
–4
50
100
150
200
250
300
350
400
450
VPEAK =0V
VGAIN =0V
OUTPUT
INPUT
Figure 14. Overdrive Recovery Time
20
–80
0.1
1k
05
69
9
-00
4
FREQUENCY (MHz)
CO
M
O
N
-M
O
D
E
RE
JE
CT
IO
N
(
d
B)
1
10
100
10
0
–10
–20
–30
–40
–50
–60
–70
VGAIN =1V
VPEAK =1V
VGAIN =0V
VPEAK =0V
Figure 15. Common-Mode Rejection vs. Frequency
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