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參數(shù)資料
| 型號(hào)： | AD8108 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
| 中文描述： | 325兆赫，8 × 8的緩沖視頻交叉點(diǎn)開關(guān) |
| 文件頁數(shù)： | 16/28頁 |
| 文件大?。?/td> | 434K |
| 代理商： | AD8108 |
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AD8108/AD8109
–16–
REV. 0
In a similar fashion, if both
CE
and
UPDATE
are taken LOW
after initial power-up, the random power-up data in the shift
register will be programmed into the matrix. T herefore, in order
to prevent the crosspoint from being programmed into an un-
known state DO NOT APPLY LOW LOGIC LEVELS T O
BOT H
CE
AND
UPDATE
AFT ER POWER IS INIT IALLY
APPLIED. Programming the full shift register one time to a
desired state by either serial or parallel programming after initial
power-up will eliminate the possibility of programming the
matrix to an unknown state.
T o change an output’s programming via parallel programming,
SER
/PAR and
UPDATE
should be taken HIGH and
CE
should
be taken LOW. T he CLK signal should be in the HIGH state.
T he address of the output that is to be programmed should be
put on A0–A2. T he first three data bits (D0–D2) should contain
the information that identifies the input that is programmed to
the output that is addressed. T he fourth data bit (D3) will de-
termine the enabled state of the output. If D3 is LOW (output
disabled) the data on D0–D2 does not matter.
After the desired address and data signals have been established,
they can be latched into the shift register by a HIGH to LOW
transition of the CLK signal. T he matrix will not be programmed,
however, until the
UPDATE
signal is taken low. T hus, it is
possible to latch in new data for several or all of the outputs first
via successive negative transitions of CLK while
UPDATE
is
held high, and then have all the new data take effect when
UPDATE
goes LOW. T his is the technique that should be
used when programming the device for the first time after
power-up when using parallel programming.
POWE R-ON
RESET
When powering up the AD8108/AD8109 it is usually desirable
to have the outputs come up in the disabled state. T he
RESET
pin, when taken LOW will cause all outputs to be in the dis-
abled state. However, the
RESET
signal DOES NOT RESET
ALL REGIST ERS in the AD8108/AD8109. T his is important
when operating in the parallel programming mode. Please refer
to that section for information about programming internal
registers after power-up. Serial programming will program the
entire matrix each time, so no special considerations apply.
Since the data in the shift register is random after power-up,
they should not be used to program the matrix or else the matrix
can enter unknown states. T o prevent this, DO NOT APPLY
LOGIC LOW SIGNALS T O BOT H
CE
AND
UPDATE
INIT IALLY AFT ER POWER-UP. T he shift register should
first be loaded with the desired data, and then
UPDATE
can be
taken LOW to program the device.
T he
RESET
pin has a 20 k
pull-up resistor to DVDD that can
be used to create a simple power-up reset circuit. A capacitor
from
RESET
to ground will hold
RESET
LOW for some time
while the rest of the device stabilizes. T he LOW condition will
cause all the outputs to be disabled. T he capacitor will then
charge through the pull-up resistor to the HIGH state, thus
allowing full programming capability of the device.
Gain Selection
T he 8
×
8 crosspoints come in two versions depending on the
desired gain of the analog circuit paths. T he AD8108 device is
unity gain and can be used for analog logic switching and other
applications where unity gain is desired. T he AD8108 can also
be used for the input and interior sections of larger crosspoint
arrays where termination of output signals is not usually used.
T he AD8108 outputs have a very high impedance when their
outputs are disabled.
For devices that will be used to drive a terminated cable with its
outputs, the AD8109 can be used. T his device has a built-in
gain of two that eliminates the need for a gain-of-two buffer to
drive a video line. Because of the presence of the feedback net-
work in these devices, the disabled output impedance is about
1 k
.
If external amplifiers will be used to provide a G = +2, our
AD8079 is a fixed gain of +2 buffer.
Creating Larger Crosspoint Arrays
T he AD8108/AD8109 are high density building blocks for cre-
ating crosspoint arrays of dimensions larger than 8
×
8. Various
features such as output disable, chip enable, and gain-of-one
and -two options are useful for creating larger arrays. For very
large arrays, they can be used along with the AD8116, a 16
×
16
video crosspoint device. In addition, systems that require more
inputs than outputs can use the AD8110 and/or the AD8111,
which are (gain-of-one and gain-of-two) 16
×
8 crosspoint
switches.
T he first consideration in constructing a larger crosspoint is to
determine the minimum number of devices required. T he 8
×
8
architecture of the AD8108/AD8109 contains 64 “points,”
which is a factor of 16 greater than a 4
×
1 crosspoint. T he PC
board area and power consumption savings are readily apparent
when compared to using these smaller devices.
For a nonblocking crosspoint, the number of points required is
the product of the number of inputs multiplied by the number
of outputs. Nonblocking requires that the programming of a
given input to one or more outputs does not restrict the avail-
ability of that input to be a source for any other outputs.
Some nonblocking crosspoint architectures will require more
than this minimum as calculated above. Also, there are blocking
architectures that can be constructed with fewer devices than
this minimum. T hese systems have connectivity available on a
statistical basis that is determined when designing the overall
system.
T he basic concept in constructing larger crosspoint arrays is to
connect inputs in parallel in a horizontal direction and to “wire-
OR” the outputs together in the vertical direction. T he meaning
of horizontal and vertical can best be understood by looking at a
diagram.
An 8 input by 16 output crosspoint array can be constructed as
shown in Figure 42. T his configuration parallels two inputs per
channel and does not require paralleling of any outputs. Inputs
are easier to parallel than outputs, because there are lower
parasitics involved. For a 16
×
8 crosspoint, the AD8110 (gain
of one) or AD8111 (gain of two) device can be used. T hese
devices are already configured into a 16
×
8 crosspoint in a
single device.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD8108-EB | ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84% |
| AD8108AST | 325 MHz, 8 x 8 Buffered Video Crosspoint Switches |
| AD8109 | 325 MHz, 8 x 8 Buffered Video Crosspoint Switches |
| AD8109AST | ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84% |
| AD8109* | 325 MHz. 8 3 8 Buffered Video Crosspoint Switches |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8108_05 | 制造商:AD 制造商全稱:Analog Devices 功能描述:325 MHz, 8 ?? 8 Buffered Video Crosspoint Switches |
| AD8108AST | 制造商:Analog Devices 功能描述:Analog Video Crosspoint 325MHz 8 x 8 80-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:TQFP 250MHZ 8X8 G=+1 BUF VID XPOINT SW. - Tape and Reel 制造商:Analog Devices 功能描述:SWITCH CROSSPOINT 8X8 SMD 8108 |
| AD8108ASTZ | 功能描述:IC VIDEO CROSSPOINT SWIT 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| AD8108ASTZ | 制造商:Analog Devices 功能描述:IC SWITCH VIDEO |
| AD8108ASTZ2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:325 MHz, 8 ?? 8 Buffered Video Crosspoint Switches |
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