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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | AD8056ARM-REEL |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 6/17闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC OPAMP VF DUAL LDIST LN 8MSOP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 3,000 |
| 鏀惧ぇ鍣ㄩ鍨嬶細 | 闆诲鍙嶉 |
| 闆昏矾鏁�(sh霉)锛� | 2 |
| 杞�(zhu菐n)鎻涢€熺巼锛� | 1400 V/µs |
| -3db甯跺锛� | 300MHz |
| 闆绘祦 - 杓稿叆鍋忓锛� | 400nA |
| 闆诲 - 杓稿叆鍋忕Щ锛� | 3000µV |
| 闆绘祦 - 闆绘簮锛� | 5.4mA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 60mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 8 V ~ 12 V锛�±4 V ~ 6 V |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-MSOP |
| 鍖呰锛� | 甯跺嵎 (TR) |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�鐣�(d膩ng)鍓嶇6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�
AD8055/AD8056
Rev. J | Page 13 of 16
FREQUENCY (MHz)
5
4
鈥�5
1
鈥�2
鈥�3
鈥�4
3
2
鈥�1
0
NO
RM
AL
IZ
E
D
G
A
IN
(
d
B)
0.3
1
10
100
500
CL
402
100
402
50
VIN =0dBm
CL =0pF
CL = 10pF
CL = 20pF
CL =30pF
01
063
-03
9
POWER DISSIPATION LIMITS
With a 10 V supply (total VCC VEE), the quiescent power
dissipation of the AD8055 in the SOT-23-5 package is 65 mW,
while the quiescent power dissipation of the AD8056 in the
MSOP-8 is 120 mW. This translates into a 15.6掳C rise above the
ambient for the SOT-23-5 package and a 24掳C rise for the
MSOP-8 package.
The power dissipated under heavy load conditions is
approximately equal to the supply voltage minus the output
voltage, times the load current, plus the quiescent power
previously computed. The total power dissipation is then
multiplied by the thermal resistance of the package to find the
temperature rise, above ambient, of the part. The junction
temperature should be kept below 150掳C.
Figure 39. Capacitive Load Drive
In general, to minimize peaking or to ensure the stability for
larger values of capacitive loads, a small series resistor, R
The AD8055 in the SOT-23-5 package can dissipate 270 mW,
while the AD8056 in the MSOP-8 package can dissipate
325 mW (at 85掳C ambient) without exceeding the maximum
die temperature. In the case of the AD8056, this is greater than
1.5 V rms into 50 惟, enough to accommodate a 4 V p-p sine
wave signal on both outputs simultaneously. However, because
each output of the AD8055 or AD8056 is capable of supplying
as much as 110 mA into a short circuit, a continuous short-
circuit condition will exceed the maximum safe junction
temperature.
S
, can
be added between the op amp output and the capacitor, CL. For
C
RESISTOR SELECTION
Table 3 is a guide for resistor selection for maintaining gain
flatness vs. frequency for various values of gain.
Table 3.
Gain
RF (惟)
RG (惟)
3 dB Bandwidth (MHz)
+1
0
300
+2
402
160
+5
1 k
249
45
+10
909
100
20
DRIVING CAPACITIVE LOADS
When driving a capacitive load, most op amps exhibit peaking
in the frequency response just before the frequency rolls off.
Figure 39 shows the responses for an AD8056 running at a gain
of +2, with an 100 惟 load that is shunted by various values of
capacitance. It can be seen that under these conditions the part
is still stable with capacitive loads of up to 30 pF.
L
chosen to produce less than 1 dB of peaking in the frequency
response. Note also that after a sharp rise, RS quickly settles to
approximately 25 惟.
50
AD8055
+5V
鈥�5V
402
6
7
2
3
4
FET PROBE
VIN =0dBm
VOUT
RS
CL
0.1F
10F
0.1F
10F
01
06
3-
04
0
Figure 40. Setup for R vs. C
S
L
40
0
35
20
15
10
5
30
25
CL (pF)
R
S
(
)
0
1020
3040
5060
270
0
106
3-
0
41
Figure 41. R vs. C
S
L
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| AD8056AR-REEL | IC OPAMP VF DUAL LDIST LN 8SOIC |
| AD8052ARM-REEL | IC OPAMP VF R-R DUAL LDIST 8MSOP |
| AD8052AR-REEL | IC OPAMP VF R-R DUAL LDIST 8SOIC |
| NPPN082FFKP-RC | CONN RECEPT 2MM DUAL SMD 16POS |
| NPPC191KFXC-RC | CONN FMALE 19POS .1" SMD GOLD |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
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