@ TA = 25掳C, VS
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� AD8052AR
寤犲晢锛� Analog Devices Inc
鏂囦欢闋佹暩(sh霉)锛� 24/25闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC OPAMP VF R-R DUAL LDIST 8SOIC
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 98
鏀惧ぇ鍣ㄩ鍨嬶細 闆诲鍙嶉
闆昏矾鏁�(sh霉)锛� 2
杓稿嚭椤炲瀷锛� 婊挎摵骞�
杞�(zhu菐n)鎻涢€熺巼锛� 170 V/µs
-3db甯跺锛� 110MHz
闆绘祦 - 杓稿叆鍋忓锛� 1.4µA
闆诲 - 杓稿叆鍋忕Щ锛� 1800µV
闆绘祦 - 闆绘簮锛� 4.8mA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 45mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 3 V ~ 12 V锛�±1.5 V ~ 6 V
宸ヤ綔婧害锛� -40°C ~ 125°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-SO
鍖呰锛� 绠′欢
AD8051/AD8052/AD8054
Rev. J | Page 7 of 24
@ TA = 25掳C, VS = 卤5 V, RL = 2 k惟 to ground, unless otherwise noted.
Table 3.
AD8051A/AD8052A
AD8054A
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
3 dB Small Signal Bandwidth
G = +1, VOUT = 0.2 V p-p
70
110
85
160
MHz
G = 1, +2, VOUT = 0.2 V p-p
50
65
MHz
Bandwidth for 0.1 dB Flatness
G = +2, VOUT = 0.2 V p-p,
RL = 150 惟,
RF = 1.1 k惟 (AD8051A/
AD8052A)
20
MHz
RF = 200 惟 (AD8054A)
15
MHz
Slew Rate
G = 1, VOUT = 2 V step
105
170
150
190
V/渭s
Full Power Response
G = +1, VOUT = 2 V p-p
40
50
MHz
Settling Time to 0.1%
G = 1, VOUT = 2 V step
50
40
MHz
NOISE/DISTORTION PERFORMANCE
Total Harmonic Distortion
fC = 5 MHz, VOUT = 2 V p-p,
G = +2
71
72
dB
Input Voltage Noise
f = 10 kHz
16
nV/鈭欻z
Input Current Noise
f = 10 kHz
900
fA/鈭欻z
Differential Gain Error (NTSC)
G = +2, RL = 150 惟
0.02
0.06
%
RL = 1 k惟
0.02
%
Differential Phase Error (NTSC)
G = +2, RL = 150 惟
0.11
0.15
Degrees
RL = 1 k惟
0.02
0.03
Degrees
Crosstalk
f = 5 MHz, G = +2
60
dB
DC PERFORMANCE
Input Offset Voltage
1.8
11
1.8
13
mV
TMIN TMAX
27
32
mV
Offset Drift
10
15
渭V/掳C
Input Bias Current
1.4
2.6
2
4.5
渭A
TMIN TMAX
3.5
4.5
渭A
Input Offset Current
0.1
0.75
0.2
1.2
渭A
Open-Loop Gain
RL = 2 k惟
88
96
84
96
dB
TMIN TMAX
96
dB
RL = 150 惟
78
82
76
82
dB
TMIN TMAX
80
dB
INPUT CHARACTERISTICS
Input Resistance
290
300
k惟
Input Capacitance
1.4
1.5
pF
Input Common-Mode Voltage Range
5.2 to
+4
5.2 to
+4
V
Common-Mode Rejection Ratio
VCM = 5 V to +3.5 V
72
88
70
86
dB
OUTPUT CHARACTERISTICS
Output Voltage Swing
RL = 10 k惟
4.98 to
+4.98
4.97 to
+4.97
V
RL = 2 k惟
4.85 to
+4.85
4.97 to
+4.97
4.8 to
+4.8
4.9 to
+4.9
V
RL = 150 惟
4.45 to
+4.3
4.6 to
+4.6
4.0 to
+3.8
4.5 to
+4.5
V
Output Current
VOUT = 4.5 V to +4.5 V
45
30
mA
TMIN TMAX
45
30
mA
Short-Circuit Current
Sourcing
100
60
mA
Sinking
160
100
mA
Capacitive Load Drive
G = +1 (AD8051/AD8052)
50
pF
G = +2 (AD8054)
40
pF
鐩搁棞(gu膩n)PDF璩囨枡
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鍙冩暩(sh霉)鎻忚堪
AD8052AR TUBE 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:AMP DUAL HSPEED RRO/P (TUBE98) SMD
AD8052AR-EBZ 鍔熻兘鎻忚堪:BOARD EVAL FOR AD8052AR RoHS:鏄� 椤炲垾:绶ㄧ▼鍣紝闁嬬櫦(f膩)绯荤当(t菕ng) >> 瑭�(p铆ng)浼版澘 - 閬�(y霉n)绠楁斁澶у櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:-
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*鍨嬭櫉(h脿o) *鏁�(sh霉)閲� 寤犲晢 鎵硅櫉(h脿o) 灏佽
娣诲姞鏇村閲囪臣

鎴戠殑鑱�(li谩n)绯绘柟寮�

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