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參數(shù)資料
| 型號： | AD8022ARZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP VF DUAL LN LP 8SOIC |
| 設(shè)計資源： | AD7266 SAR ADC in DC-Coupled Differential and Single-Ended Appls (CN0039) AD7265 in Differential and Single-Ended Configurations Using AD8022 (CN0048) |
| 標準包裝： | 98 |
| 放大器類型： | 電壓反饋 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 50 V/µs |
| -3db帶寬： | 130MHz |
| 電流 - 輸入偏壓： | 2.5µA |
| 電壓 - 輸入偏移： | 1500µV |
| 電流 - 電源： | 4mA |
| 電流 - 輸出 / 通道： | 55mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 26 V，±2.25 V ~ 13 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 769 (CN2011-ZH PDF) |
Data Sheet
AD8022
Rev. C | Page 15 of 16
+VIN
–VIN
+VOUT
–VOUT
191
Ω
1%
191
Ω
1%
243
Ω
1%
243
Ω
1%
249
Ω
1%
422
Ω
1%
249
Ω
1%
COMMON-
MODE
VOLTAGE
SIGNAL CM LEVEL
8200pF
10%
8200pF
10%
6800pF
5% NPO
6800pF
5% NPO
0.1
μF
50V
5%
NPO
0.1
μF
16V
10%
X7R
AD8022
12V
3
2
8
1
AD8022
6
5
4
7
01053-041
Figure 41. Differential Input Sallen-Key Filter
Using AD8022 on Single Supply, +12 V
FREQUENCY (Hz)
(dB)
7.5
–42.5
–37.5
–32.5
–27.5
–22.5
–17.5
–12.5
–7.5
–2.5
2.5
10k
10M
1M
100k
01053-042
Figure 42. Frequency Response of Sallen-Key Filter
LAYOUT CONSIDERATIONS
As is the case with all high speed amplifiers, careful attention to
printed circuit board layout details prevent associated board
parasitics from becoming problematic. Proper RF design
technique is mandatory. The PCB should have a ground plane
covering all unused portions of the component side of the
board to provide a low impedance return path. Removing the
ground plane from the area near the input signal lines reduces
stray capacitance. Chip capacitors should be used for supply
bypassing. One end of the capacitor should be connected to the
ground plane, and the other should be connected no more than
1/8 inch away from each supply pin. An additional large
(0.47 μF to 10 μF) tantalum capacitor should be connected in
parallel, although not necessarily as close, in order to supply
current for fast, large signal changes at the AD8022 output.
Signal lines connecting the feedback and gain resistors should
be as short as possible, minimizing the inductance and stray
capacitance associated with these traces. Locate termination
resistors and loads as close as possible to the input(s) and
output, respectively. Adhere to stripline design techniques for
long signal traces (greater than about 1 inch). Following these
generic guidelines improves the performance of the AD8022 in
all applications.
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