參數(shù)資料
型號(hào): AD8011ANZ
廠商: Analog Devices Inc
文件頁數(shù): 7/17頁
文件大小: 0K
描述: IC OPAMP CF LP LDIST 30MA 8DIP
標(biāo)準(zhǔn)包裝: 50
放大器類型: 電流反饋
電路數(shù): 1
轉(zhuǎn)換速率: 3500 V/µs
-3db帶寬: 400MHz
電流 - 輸入偏壓: 5µA
電壓 - 輸入偏移: 2000µV
電流 - 電源: 1.3mA
電流 - 輸出 / 通道: 30mA
電壓 - 電源,單路/雙路(±): 3 V ~ 12 V,±1.5 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
產(chǎn)品目錄頁面: 769 (CN2011-ZH PDF)
REV. C
–14–
AD8011
LAYOUT CONSIDERATIONS
The specified high speed performance of the AD8011 requires
careful attention to board layout and component selection. Table I
shows the recommended component values for the AD8011.
Proper RF design techniques and low parasitic component selec-
tion are mandatory.
Table I. Typical Bandwidth vs. Gain Setting Resistors
Small Signal
–3 dB BW (MHz),
Gain
RF ( )RG ( )RT ( )VS =
5 V
–1
1000
52.3
150
–2
1000
499
54.9
130
–10
499
49.9
140
+1
1000
49.9
400
+2
1000
49.9
250
+10
422
47.5
49.9
100
+6
1000
200
49.9
70
+6
500
100
49.9
170
RT chosen for 50
characteristic input impedance. R
O chosen for characteristic
output impedance.
The PCB should have a ground plane covering all unused
portions of the component side of the board to provide a low
impedance ground path. The ground plane should be removed
from the area near the input pins to reduce stray capacitance.
Chip capacitors should be used for supply bypassing (see
Figure 15). One end should be connected to the ground plane
and the other within 1/8 in. of each power pin. An additional tan-
talum electrolytic capacitor (4.7
F – 10 F) should be connected
in parallel.
The feedback resistor should be located close to the inverting
input pin in order to keep the stray capacitance at this node to a
minimum. Capacitance greater than 1.5 pF at the inverting input
will significantly affect high speed performance when operating
at low noninverting gains.
Stripline design techniques should be used for long signal traces
(greater than about 1 in.). These should be designed with the
proper system characteristic impedance and be properly
terminated at each end.
C1
0.01 F
C2
0.01 F
C4
10 F
C3
10 F
RT
INVERTING CONFIGURATION
VIN
VOUT
+VS
–VS
RG
RF
RO
C1
0.01 F
C2
0.01 F
C4
10 F
C3
10 F
RT
NONINVERTING CONFIGURATION
VIN
+VS
–VS
VOUT
RG
RF
RO
Figure 15. Inverting and Noninverting Configurations
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