參數(shù)資料
型號(hào)： AD8002
廠(chǎng)商： Analog Devices, Inc.
英文描述： Dual 600 MHz, 50 mW Current Feedback Amplifier(600MHz,50mW雙電流反饋放大器)
中文描述： 雙600兆赫，50毫瓦電流反饋放大器（頻率600MHz，50mW的雙電流反饋放大器）
文件頁(yè)數(shù)： 10/16頁(yè)
文件大?。?/td> 507K
代理商： AD8002
AD8002
REV. B
–10–
Printed Circuit Board Layout Considerations
As to be expected for a wideband amplifier, PC board parasitics
can affect the overall closed-loop performance. Of concern are
stray capacitances at the output and the inverting input nodes. If
a ground plane is to be used on the same side of the board as
the signal traces, a space (5 mm min) should be left around the
signal lines to minimize coupling. Additionally, signal lines con-
necting the feedback and gain resistors should be short enough
so that their associated inductance does not cause high frequency
gain errors. Line lengths on the order of less than 5 mm are rec-
ommended. If long runs of coaxial cable are being driven, dis-
persion and loss must be considered.
Power Supply Bypassing
Adequate power supply bypassing can be critical when optimiz-
ing the performance of a high frequency circuit. Inductance in
the power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, then bypass capacitors
(typically greater than 1
μ
F) will be required to provide the best
settling time and lowest distortion. A parallel combination of
4.7
μ
F and 0.1
μ
F is recommended. Some brands of electrolytic
capacitors will require a small series damping resistor
≈
4.7
for
optimum results.
DC E rrors and Noise
T here are three major noise and offset terms to consider in a
current feedback amplifier. For offset errors refer to the equa-
tion below. For noise error the terms are root-sum-squared to
give a net output error. In the circuit below (Figure 41) they are
input offset (V
IO
) which appears at the output multiplied by the
noise gain of the circuit (1 + R
F
/R
I
), noninverting input current
(I
BN
×
R
N
) also multiplied by the noise gain, and the inverting
input current, which when divided between R
F
and R
I
and sub-
sequently multiplied by the noise gain always appears at the out-
put as I
BN
×
R
F
. T he input voltage noise of the AD8002 is a low
2 nV/
√
Hz
. At low gains though the inverting input current noise
times R
F
is the dominant noise source. Careful layout and de-
vice matching contribute to better offset and drift specifications
for the AD8002 compared to many other current feedback am-
plifiers. T he typical performance curves in conjunction with the
equations below can be used to predict the performance of the
AD8002 in any application.
V
OUT
=
V
IO
×
1
+
R
F
R
I
±
I
BN
×
R
N
×
1
+
R
F
R
I
±
I
BI
×
R
F
R
F
R
I
R
N
I
BN
V
OUT
I
BI
Figure 41. Output Offset Voltage
V
O
V
IN
=
G
×
T
Z
(
S
)
T
Z
(
S
)
+
G
×
R
IN
+
R
1
G
=
1
+
R
1
R
2
R
IN
=
1/
g
M
≈
50
R1
T HE ORY OF OPE RAT ION
A very simple analysis can put the operation of the AD8002, a
current feedback amplifier, in familiar terms. Being a current
feedback amplifier, the AD8002’s open-loop behavior is ex-
pressed as transimpedance,
V
O
/
I
–IN
, or T
Z
. T he open-loop
transimpedance behaves just as the open-loop voltage gain of a
voltage feedback amplifier, that is, it has a large dc value and
decreases at roughly 6 dB/octave in frequency.
Since the R
IN
is proportional to 1/g
M
, the equivalent voltage
gain is just T
Z
×
g
M
, where the g
M
in question is the trans-
conductance of the input stage. T his results in a low open-loop
input impedance at the inverting input, a now familiar result.
Using this amplifier as a follower with gain, Figure 40, basic
analysis yields the following result.
V
OUT
R2
R
IN
V
IN
Figure 40.
Recognizing that G
×
R
IN
<< R
1
for low gains, it can be seen to
the first order that bandwidth for this amplifier is independent
of gain (G).
Considering that additional poles contribute excess phase at
high frequencies, there is a minimum feedback resistance below
which peaking or oscillation may result. T his fact is used to de-
termine the optimum feedback resistance, R
F
. In practice para-
sitic capacitance at the inverting input terminal will also add
phase in the feedback loop, so picking an optimum value for R
F
can be difficult.
Achieving and maintaining gain flatness of better than 0.1 dB at
frequencies above 10 MHz requires careful consideration of
several issues.
Choice of Feedback and Gain Resistors
T he fine scale gain flatness will, to some extent, vary with feed-
back resistance. It, therefore, is recommended that once opti-
mum resistor values have been determined, 1% tolerance values
should be used if it is desired to maintain flatness over a wide
range of production lots. In addition, resistors of different con-
struction have different associated parasitic capacitance and in-
ductance. Surface mount resistors were used for the bulk of the
characterization for this data sheet. It is not recommended that
leaded components be used with the AD8002.
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