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參數(shù)資料
| 型號： | AD7877ACPZ-500RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/45頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT TOUCHSCREEN 32LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 電阻 |
| 觸摸面板接口： | 4 線 |
| 輸入數(shù)/鍵： | 1 TSC |
| 分辨率（位）： | 12 b |
| 評估套件： | 可供 |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 數(shù)據(jù)速率/采樣率 (SPS，BPS)： | 125k |
| 電壓基準(zhǔn)： | 外部，內(nèi)部 |
| 電源電壓： | 2.7 V ~ 5.25 V |
| 電流 - 電源： | 1µA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD7877ACPZ-500RL7DKR |
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Data Sheet
AD7877
Rev. D | Page 29 of 44
WRITE TIMING
No serial interface operations can take place when CS is high.
To write to the AD7877, CS must be taken low. To write to the
device, a burst of 16 clock pulses is input to DCLK while the write
data is input to DIN. Data is clocked in on the rising edge of
DCLK. If multiple write operations are to be performed, CS must
be taken high after the end of each write operation before another
write operation can be performed by taking CS low again.
READING DATA
Data is available on the DOUT pin following the falling edge of
CS, when the device is being clocked. The MSB is clocked out
on the falling edge of CS, with subsequent data bits clocked out
on the falling edge of DCLK.
After CS is taken low and the device is clocked, the AD7877
outputs data from the register whose read address is currently
stored in Control Register 1. Once this data has been output,
the address increments automatically. CS must be taken high
between reads. When CS is taken low again, reading continues
from the register whose read address is in Control Register 1,
provided that a write operation does not change the address. If
the register read address reaches 11111b, it is then reset to zero.
This feature allows all registers to be read out in sequence with-
out having to explicitly write all their addresses to the device.
Note that because data-words are 16 bits long, but the data
registers are only 12 bits long, or 8 bits in the case of GPIO
registers, the first four bits of a readback data-word are zeros, or
the first 8 bits in the case of a GPIO register.
VDRIVE PIN
The supply voltage to all pins associated with the serial interface
(DAV, DIN, DOUT, DCLK, CS, PENIRQ, and ALERT) is
separate from the main VCC supply and is connected to the
VDRIVE pin. This allows the AD7877 to be connected directly to
processors whose supply voltage is less than the minimum
operating voltage of the AD7877, in fact, as low as 1.7 V.
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