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參數(shù)資料
| 型號(hào)： | AD7874SQ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 3/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAS 12BIT 4CH 5V 28-CDIP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類(lèi)型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 分辨率（位）： | 12 b |
| 采樣率（每秒）： | 116k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 電壓電源： | 雙 ± |
| 電源電壓： | ±5V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類(lèi)型： | 通孔 |
| 封裝/外殼： | 28-CDIP（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 28-CDIP |
| 包裝： | 管件 |
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AD7874
REV. C
–11–
Some applications may require that the conversion is initiated
by the microprocessor rather than an external timer. One option
is to decode the AD7874 CONVST from the address bus so
that a write operation starts a conversion. Data is read at the
end of the conversion sequence as before. Figure 16 shows an
example of initiating conversion using this method. Note that
for all interfaces, a read operation should not be attempted dur-
ing conversion.
AD7874–MC68000 Interface
An interface between the AD7874 and the MC68000 is shown
in Figure 15. As before, conversion is initiated using an external
timer. The AD7874 INT line can be used to interrupt the pro-
cessor or, alternatively, software delays can ensure that conver-
sion has been completed before a read to the AD7874 is
attempted. Because of the nature of its interrupts, the 68000
requires additional logic (not shown in Figure 15) to allow it to
be interrupted correctly. For further information on 68000 in-
terrupts, consult the 68000 users manual.
The MC68000 AS and R/W outputs are used to generate a
separate RD input signal for the AD7874. CS is used to drive
the 68000 DTACK input to allow the processor to execute a
normal read operation to the AD7874. The conversion results
are read using the following 68000 instruction:
MOVE.W ADC,D0
where D0 is the 68000 D0 register and
ADC is the AD7874 address.
A0
A15
D15
D0
ADDR
DECODE
ADDRESS BUS
DATA BUS
CONVST
CS
DB11
DB0
RD
AD7874*
MC68000
*ADDITIONAL PINS OMITTED FOR CLARITY
R/W
AS
EN
DTACK
TIMER
Figure 15. AD7874–MC68000 Interface
AD7874–8086 Interface
Figure 16 shows an interface between the AD7874 and the 8086
microprocessor. Unlike the previous interface examples, the
microprocessor initiates conversion. This is achieved by gating
the 8086 WR signal with a decoded address output (different to
the AD7874 CS address). The AD7874 INT line is used to in-
terrupt the microprocessor when the conversion sequence is
completed. Data is read from the AD7874 using the following
instruction:
MOV AX,ADC
where AX is the 8086 accumulator and
ADC is the AD7874 address.
ALE
AD15
AD0
ADDR
DECODE
ADDRESS BUS
ADDRESS/DATA BUS
CONVST
CS
DB11
DB0
RD
AD7874*
8086
*ADDITIONAL PINS OMITTED FOR CLARITY
WR
RD
LATCH
Figure 16. AD7874–8086 Interface
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| AD7875CQ | 功能描述:IC ADC 12BIT SAMPLING 5V 24CDIP RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類(lèi)型:2 個(gè)單端，單極 |
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