參數(shù)資料
型號(hào)： AD7873BCP
廠(chǎng)商： ANALOG DEVICES INC
元件分類(lèi)： 消費(fèi)家電
英文描述： Touch Screen Digitizer
中文描述： SPECIALTY CONSUMER CIRCUIT, QCC16
封裝： 4 X 4 MM, MO-220VGGC, LFCSP-16
文件頁(yè)數(shù)： 5/28頁(yè)
文件大?。?/td> 657K
代理商： AD7873BCP
AD7873
TIMING SPECIFICATIONS
T
A
= T
MIN
to T
MAX
, unless otherwise noted; V
CC
= 2.7 V to 5.25 V, V
REF
= 2.5 V.
Table 2. Timing Specifications
1
Parameter
Limit at T
MIN
, T
MAX
f
DCLK2
10
2
t
ACQ
1.5
t
1
10
t
2
60
t
33
60
t
4
200
t
5
200
t
6
60
t
7
10
t
8
10
t
9
200
t
10
0
t
11
100
t
124
100
Rev. D | Page 5 of 28
Unit
kHz min
MHz max
μs min
ns min
ns max
ns max
ns min
ns min
ns max
ns min
ns min
ns max
ns min
ns max
ns max
Description
Acquisition time
CS falling edge to first DCLK rising edge
CS falling edge to busy three-state disabled
CS falling edge to DOUT three-state disabled
DCLK high pulse width
DCLK low pulse width
DCLK falling edge to BUSY rising edge
Data setup time prior to DCLK rising edge
Data valid to DCLK hold time
Data access time after DCLK falling edge
CS rising edge to DCLK ignored
CS rising edge to BUSY high impedance
CS rising edge to DOUT high impedance
3
1
Sample tested at 25°C to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of V
CC
) and timed from a voltage level of 1.6 V.
2
Mark/Space ratio for the DCLK input is 40/60 to 60/40.
3
Measured with the load circuit of
and defined as the time required for the output to cross 0.4 V or 2.0 V.
Figure 2
4
t
12
is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of
back to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t
12
, quoted in the timing characteristics is the true bus relinquish
time of the part and is independent of the bus loading.
Figure 2
. The measured number is then extrapolated
0
200
μ
A
1.6V
200
μ
A
I
OL
I
OH
TO
OUTPUT
PIN
C
L
50pF
Figure 2. Load Circuit for Digital Output Timing Specifications
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