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參數(shù)資料
| 型號(hào)： | AD7856KRZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 8CHAN 5V 24SOIC |
| 標(biāo)準(zhǔn)包裝： | 31 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 285k |
| 數(shù)據(jù)接口： | 8051，QSPI?，串行，SPI? µP |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 89.25mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | 0°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個(gè)單端，單極；4 個(gè)偽差分，單極 |
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AD7856
–12–
REV. A
STATUS REGISTER
The arrangement of the Status Register is shown below. The status register is a read only register and contains 16 bits of data. The
status register is selected by first writing to the control register and putting two 1s in RDSLT1 and RDSLT0. The function of the
bits in the status register are described below. The power-up status of all bits is 0.
START
WRITE TO CONTROL REGISTER
SETTING RDSLT0 = RDSLT1 = 1
READ STATUS REGISTER
Figure 6. Flowchart for Reading the Status Register
MSB
ZERO
BUSY
SGL/DIFF
CH2
CH1
CH0
PMGT1
PMGT0
RDSLT1
RDSLT0
2/3 MODE
X
CALMD
CALSLT1
CALSLT0
STCAL
LSB
STATUS REGISTER BIT FUNCTION DESCRIPTION
Bit
Mnemonic
Comment
15
ZERO
This bit is always 0.
14
BUSY
Conversion/Calibration Busy Bit. When this bit is 1 it indicates that there is a conversion or
calibration in progress. When this bit is 0, there is no conversion or calibration in progress.
13
SGL/
DIFF
These four bits indicate the channel which is selected for conversion (see Table III).
12
CH2
11
CH1
10
CH0
9
PMGT1
Power management bits. These bits, along with the
SLEEP pin, will indicate if the part is in a
8
PMGT0
power-down mode or not. See Table VI for description.
7
RDSLT1
Both of these bits are always 1, indicating it is the status register which is being read (see Table II).
6
RDSLT0
52/
3 MODE
Interface Mode Select Bit. With this bit at 0, the device is in Interface Mode 2. With this bit at 1,
the device is in Interface Mode 1. This bit is reset to 0 after every read cycle.
4
X
Don’t care bit.
3
CALMD
Calibration Mode Bit. A 0 in this bit indicates a self calibration is selected, and a 1 in this bit
indicates a system calibration is selected (see Table IV).
2
CALSLT1
Calibration Selection Bits and Start Calibration Bit. The STCAL bit is read as a 1 if a
1
CALSLT0
calibration is in progress and as a 0 if there is no calibration in progress. The CALSLT1 and
0
STCAL
CALSLT0 bits indicate which of the calibration registers are addressed for reading and writing
(see section on the Calibration Registers for more details).
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