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參數(shù)資料
| 型號： | AD7821TQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS High Speed, mP-Compatible 8-Bit ADC with Track/Hold Function |
| 中文描述： | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP20 |
| 封裝： | SKINNY, HERMETIC SEALED, CERDIP-20 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 249K |
| 代理商： | AD7821TQ |
AD7821
REV. A
–4–
ABSOLUT E MAX IMUM RAT INGS*
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, + 7 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, + 7 V
Digital Input Voltage to GND
(Pins 6–8, 13) . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
+ 0.3 V
Digital Output Voltage to GND
(Pins 2–5, 9, 14–18) . . . . . . . . . . . . . . . –0.3 V, V
DD
+ 0.3 V
V
REF
(+) to GND . . . . . . . . . . . . . . . V
SS
– 0.3 V, V
DD
+ 0.3 V
V
REF
(–) to GND . . . . . . . . . . . . . . . V
SS
– 0.3 V, V
DD
+ 0.3 V
V
IN
to GND . . . . . . . . . . . . . . . . . . . V
SS
– 0.3 V, V
DD
+ 0.3 V
Operating T emperature Range
Commercial (K Version) . . . . . . . . . . . . . . –40
°
C to +85
°
C
Industrial (B Version) . . . . . . . . . . . . . . . . –40
°
C to +85
°
C
Extended (T Version) . . . . . . . . . . . . . . . –55
°
C to +125
°
C
Storage T emperature Range . . . . . . . . . . . . –65
°
C to +150
°
C
Lead T emperature (Soldering, 10 secs) . . . . . . . . . . . +300
°
C
Power Dissipation (Any Package) to +75
°
C . . . . . . . . 450 mW
Derates above +75
°
C by . . . . . . . . . . . . . . . . . . . . . 6 mW/
°
C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T his is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
T E RMINOLOGY
LE AST SIGNIFICANT BIT (LSB)
An ADC with 8-bit resolution can resolve one part in 2
8
(1/256
of full scale). For the AD7821 operating in either the unipolar
or bipolar input range with 5 V full scale, one LSB is 19.53 mV.
T OT AL UNADJUST E D E RROR
T his is a comprehensive specification which includes relative
accuracy, offset error and full-scale error.
SLE W RAT E
Slew Rate is the maximum allowable rate of change of input
signal such that the digital sample values are not in error.
T OT AL HARMONIC DIST ORT ION
T otal harmonic distortion is the ratio of the square root of the
sum of the squares of the rms value of the harmonics to the rms
value of the fundamental. For the AD7821, total harmonic dis-
tortion (T HD) is defined as
(
where V
1
is the rms amplitude of the fundamental and V
2
, V
3
,
V
4
, V
5
, V
6
, are the rms amplitudes of the individual harmonics.
20
log
V
2
2
+
V
3
2
+
V
5
2
+
V
6
2
)
V
1
dB
INT E RMODULAT ION DIST ORT ION
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products, of order (m+n), at sum and difference frequencies of
mfa+nfb, where m, n = 0, 1, 2, 3,- - - -. Intermodulation terms
are those for which m or n is not equal to zero. For example, the
second order terms include (fa + fb) and (fa – fb), and the third
order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and
(fa – 2fb). For the AD7821 intermodulation distortion is calcu-
lated separately for both the second and third order terms.
SIGNAL-T O-NOISE RAT IO
Signal-to-noise ratio (SNR) is measured signal-to-noise at the
output of the ADC. T he signal is the rms magnitude of the fun-
damental. Noise is the rms sum of all nonfundamental signals
(excluding dc) up to half the sampling frequency. SNR is de-
pendent on the number of quantization levels used in the digiti-
zation process. T he theoretical SNR for a sine wave input is
given by:
SNR = (
6.02
N +
1.76
) dB
where N is the number of bits in the ADC. T hus, for an ideal
8-bit ADC, SNR = 50 dB.
PE AK HARMONIC OR SPURIOUS NOISE
Peak harmonic or spurious noise is the rms value of the largest
nonfundamental frequency (excluding dc) up to half the sam-
pling frequency to the rms value of the fundamental.
PIN CONFIGURAT IONS
LC C C
DIP AND SOIC
PLC C
WARNING!
ESD SENSITIVE DEVICE
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7821 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
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