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參數(shù)資料
| 型號(hào)： | AD7812YRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | +2.7 V to +5.5 V, 350 kSPS, 10-Bit 4-/8-Channel Sampling ADCs |
| 中文描述： | 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | TSSOP-20 |
| 文件頁(yè)數(shù)： | 7/19頁(yè) |
| 文件大?。?/td> | 210K |
| 代理商： | AD7812YRU |
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AD7811/AD7812
–7–
REV. B
Control Register (AD7811)
The Control Register is a 10-bit-wide, write only register. The Control Register is written to when the AD7811 receives a falling
edge on its TFS pin. The AD7811 will maintain the same configuration until a new control byte is written to the part. The control
register can be written to at the same time data is being read. This latter feature enhances throughput rates when software control is
being used or when the analog input channels are being changed frequently. The power-up default register contents are all zeros;
therefore, when the supplies are connected, the AD7811 is powered down by default.
Control Register AD7811
9
0
X
*
0
A
1
D
P
0
D
P
V
4
N
I
/
D
N
G
A
/
F
F
I
D
L
G
S
1
H
C
0
H
C
T
S
V
N
O
C
F
E
R
T
X
E
*
This is a don’t care bit.
A0
This is the package address bit. It is used in conjunction with the package address pin to allow two AD7811s to
share the same serial bus. The AD7811 can also share the same serial bus with the AD7812. When a control word
is written to the control register of the AD7811 the control word is ignored if the package address bit in the con-
trol byte does not match how the package address pin is hardwired. Only the serial port of the device that received
the last valid control byte, i.e., the address bit matched the address pin, will attempt to drive the serial bus on the
next serial read. When the part powers up this bit is set to 0.
PD1, PD0
These bits allow the AD7811 to be fully powered down and powered up. Bit combinations PD1 = PD0 = 0 and
PD1 = PD0 = 1 override the automatic power-down decision at the end of conversion. These bits also decide the
power-down mode when the AD7811 enters a power-down at the end of a conversion. There are two power-down
modes—Full Power-Down and Partial Power-Down. See Power-Down Options section of this data sheet.
PD1
PD0
Description
0
0
1
1
0
1
0
1
Full Power-Down of the AD7811
Partial Power-Down at the End of Conversion
Full Power-Down at the End of Conversion
Power-Up the AD7811
V
IN4
/
AGND
The DIF/
SGL
bit in the control register must be set to 0 to use this option otherwise this bit is ignored. Setting
V
IN4
/
AGND
to 0 configures the analog inputs of the AD7811 as four single-ended analog inputs referenced to
analog ground (AGND). By setting this bit to 1 the input channels V
IN1
to V
IN3
are configured as three pseudo-
differential channels with respect to V
IN4
—see Table I.
This bit is used to configure the analog inputs as single ended or pseudo differential pairs. By setting this bit to 0
the analog inputs can be configured as single ended with respect to AGND, or pseudo differential with respect to
V
IN4
as explained above. Setting this bit to 1 configures the analog input channels as two pseudo differential pairs
V
IN1
/V
IN2
and V
IN3
/V
IN4
—see Table I.
These bits are used in conjunction with V
IN4
/
AGND
and DIF/
SGL
to select an analog input channel. The table
shows how the various channel selections are made—see Table I.
Setting this bit to a logic one initiates a conversion. A conversion is initiated 400 ns after a write to the control
register has taken place. This allows a signal to be acquired even if the channel is changed and a conversion
initiated in the same serial write. The bit is reset after the end of a conversion.
This bit must be set to a logic one if the user wishes to use an external reference or use V
DD
as the reference.
When the external reference is selected the on chip reference circuitry powers down.
DIF/
SGL
CH1, CH0
CONVST
EXTREF
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