參數(shù)資料
型號(hào)： AD7793BRUZ-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 11/33頁(yè)
文件大?。?/td> 0K
描述： IC ADC 24BIT 3CH LP 16-TSSOP
設(shè)計(jì)資源： Fully Isolated Input Module Based on AD7793 and ADuM5401(CN0066)
Fully Isolated Input Module Based on AD7793, ADuM5401, and a High Performance In-Amp (CN0067)
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 24
采樣率（每秒）： 500
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 2.5mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 3 個(gè)差分，單極；3 個(gè)差分，雙極
配用： EVAL-AD7793EBZ-ND - BOARD EVALUATION FOR AD7793
AD7792/AD7793
Rev. B | Page 18 of 32
Bit Location
Bit Name
Description
CON7
REFSEL
Reference Select Bit. The reference source for the ADC is selected using this bit.
REFSEL
Reference Source
0
External Reference Applied between REFIN(+) and REFIN(–).
1
Internal Reference Selected.
CON6 to
CON5
0
These bits must be programmed with a Logic 0 for correct operation.
CON4
BUF
Configures the ADC for buffered or unbuffered mode of operation. If cleared, the ADC operates in unbuffered
mode, lowering the power consumption of the device. If set, the ADC operates in buffered mode, allowing the
user to place source impedances on the front end without contributing gain errors to the system. The buffer
can be disabled when the gain equals 1 or 2. For higher gains, the buffer is automatically enabled.
With the buffer disabled, the voltage on the analog input pins can be from 30 mV below GND to 30 mV above
AVDD. When the buffer is enabled, it requires some headroom, so the voltage on any input pin must be limited
to 100 mV within the power supply rails.
CON3
0
This bit must be programmed with a Logic 0 for correct operation.
CON2 to
CON0
CH2 to
CH0
Channel Select Bits. Written by the user to select the active analog input channel to the ADC.
CH2
CH1
CH0
Channel
Calibration Pair
0
AIN1(+) – AIN1(–)
0
1
AIN2(+) – AIN2(–)
1
0
1
0
AIN3(+) – AIN3(–)
2
0
1
AIN1(–) – AIN1(–)
0
1
0
Reserved
1
0
1
Reserved
1
0
Temp Sensor
Automatically selects gain = 1 and internal reference
1
AVDD Monitor
Automatically selects gain = 1/6 and 1.17 V
reference
DATA REGISTER
RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x0000(00)
The conversion result from the ADC is stored in this data register. This is a read-only register. On completion of a read operation from
this register, the RDY bit/pin is set.
ID REGISTER
RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xXA (AD7792)/0xXB (AD7793)
The identification number for the AD7792/AD7793 is stored in the ID register. This is a read-only register.
IO REGISTER
RS2, RS1, RS0 = 1, 0, 1; Power-On/Reset = 0x00
The IO register is an 8-bit register from which data can be read or to which data can be written. This register is used to enable and select
the value of the excitation currents. Table 18 outlines the bit designations for the IO register. IO0 through IO7 indicate the bit locations;
IO denotes that the bits are in the IO register. IO7 denotes the first bit of the data stream. The number in parentheses indicates the power-
on/reset default status of that bit.
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
0(0)
IEXCDIR1(0)
IEXCDIR0(0)
IEXCEN1(0)
IEXCEN0(0)
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