參數(shù)資料
型號(hào): AD7734BRUZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 11/32頁(yè)
文件大?。?/td> 0K
描述: IC ADC 24BIT 4-CH 28-TSSOP
標(biāo)準(zhǔn)包裝: 50
位數(shù): 24
采樣率(每秒): 15.4k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 100mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 105°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 管件
輸入數(shù)目和類(lèi)型: 4 個(gè)單端,單極;4 個(gè)單端,雙極
產(chǎn)品目錄頁(yè)面: 779 (CN2011-ZH PDF)
配用: EVAL-AD7734EBZ-ND - BOARD EVALUATION FOR AD7734
Data Sheet
AD7734
Rev. A | Page 19 of 32
CHANNEL SETUP REGISTERS
8 Bits, Read/Write Register, Address 28h–2Bh, Default Value 00h
These registers are used to configure the selected channel, to configure its input voltage range, and to set up the corresponding channel
status register.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
0
Stat OPT
ENABLE
0
RNG1
RNG0
Default
0
Bit
Mnemonic
Description
7–5
0
These bits must be 0 for proper operation.
4
Stat OPT
Status Option. When this bit is set to 1, the P0 and P1 bits in the channel status register will reflect the state of
the P0 and P1 pins. When this bit is reset to 0, the RDY bit in the channel status register will reflect the channel
corresponding to the RDY bit in the ADC status register.
3
ENABLE
Channel Enable. Set this bit to 1 to enable the channel in the continuous conversion mode. A single conversion
will take place regardless of this bit’s value.
2
0
This bit must be 0 for proper operation.
1–0
RNG1–RNG0
This is the channel input voltage range (see Table 15).
TABLE 15.
RNG1
RNG0
Nominal Input Voltage Range
0
±10 V
0
1
0 V to +10 V
1
0
±5 V
1
0 V to +5 V
CHANNEL CONVERSION TIME REGISTERS
8 Bits, Read/Write Register, Address 30h–33h, Default Value 91h
The conversion time registers enable or disable chopping and configure the digital filter for a particular channel. This register value
affects the conversion time, frequency response, and noise performance of the ADC.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
CHOP
FW (7-Bit Filter Word)
Default
1
11h
Bit
Mnemonic
Description
7
CHOP
Chopping Enable Bit. Set to 1 to apply chopping mode for a particular channel.
6–0
FW
CHOP = 1, single conversion or continuous conversion with one channel enabled.
Conversion Time (s) = (FW × 128 + 248)/MCLK Frequency (MHz), the FW range is 2 to 127.
CHOP = 1, continuous conversion with two or more channels enabled.
Conversion Time (s) = (FW × 128 + 249)/MCLK Frequency (MHz), the FW range is 2 to 127.
CHOP = 0, single conversion or continuous conversion with one channel enabled.
Conversion Time (s) = (FW × 64 + 206)/MCLK Frequency (MHz), the FW range is 3 to 127.
CHOP = 0, continuous conversion with two or more channels enabled.
Conversion Time (s) = (FW × 64 + 207)/MCLK Frequency (MHz), the FW range is 3 to 127.
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