參數(shù)資料
型號(hào)： AD7731BR
廠商： ANALOG DEVICES INC
元件分類(lèi)： ADC
英文描述： Low Noise, High Throughput 24-Bit Sigma-Delta ADC
中文描述： 6-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO24
封裝： MS-013AD, SOIC-24
文件頁(yè)數(shù)： 22/44頁(yè)
文件大?。?/td> 411K
代理商： AD7731BR
AD7731
–22–
REV. 0
CIRCUIT DE SCRIPT ION
T he AD7731 is a sigma-delta A/D converter with on-chip digital
filtering, intended for the measurement of wide dynamic range,
low-frequency signals such as those in strain-gage, pressure
transducer, temperature measurement, industrial control or pro-
cess control applications. It contains a sigma-delta (or charge-
balancing) ADC, a calibration microcontroller with on-chip
static RAM, a clock oscillator, a digital filter and a bidirectional
serial communications port. T he part consumes 13.5 mA of
power supply current with a standby mode which consumes
only 20
μ
A. T he part operates from a single +5 V supply. T he
clock source for the part can be provided via an external clock
or by connecting a crystal oscillator or ceramic resonator across
the MCLK IN or MCLK OUT pins.
T he part contains three programmable-gain fully differential
analog input channels which can be reconfigured as five pseudo-
differential inputs. T he part handles a total of seven different
input ranges on all channels which are programmed via the on-
chip registers. T he differential unipolar ranges are: 0 mV to
+20 mV through 0 V to +1.28 V and the differential bipolar
ranges are:
±
20 mV through
±
1.28 V.
T he AD7731 employs a sigma-delta conversion technique to
realize up to 24 bits of no missing codes performance. T he
sigma-delta modulator converts the sampled input signal into a
digital pulse train whose duty cycle contains the digital informa-
tion. A digital low-pass filter processes the output of the sigma-
delta modulator and updates the data register at a rate that can
be programmed over the serial interface. T he output data from
the part is accessed over this serial interface. T he cutoff fre-
quency and output rate of this filter can be programmed via on-
chip registers. T he output noise performance and peak-to-peak
resolution of the part varies with gain and with the output rate
as shown in T ables I to IV.
T he analog inputs are buffered on-chip, allowing the part to
handle significant source impedances on the analog input. T his
means that external R, C filtering (for noise rejection or RFI
interference reduction) can be placed on the analog inputs if
required. T he common-mode voltage range for the analog in-
puts comes within 1.2 V of AGND and 0.95 V of AV
DD
. T he
reference input is also differential and the common-mode range
here is from AGND to AV
DD
.
T he AD7731 contains a number of hardware and software
events that set or reset status flags and bits in registers. T able
X VII summarizes which blocks and flags are affected by the
different events.
T able X VII. Reset E vents
Set Registers
to Default
Mode
Bits
Filter
Reset
Analog
Power-Down
Reset Serial
Interface
Set
RDY
Pin/Bit
Set
STDY
Bit
E vent
Power-On Reset
RESET
Pin
STANDBY
Pin
Mode 011 Write
SYNC
Pin
Mode 000 Write
Conversion or
Cal Mode Write
Clock 32 1s
Data Register Read
Yes
Yes
No
No
No
No
No
000
000
As Is
011
As Is
000
New
Value
As Is
As Is
Yes
Yes
Yes
Yes
Yes
Yes
Initial
Reset
No
No
Yes
No
Yes
Yes
No
No
No
Yes
Yes
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Yes
No
Yes
Yes
Yes
No
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