參數(shù)資料
型號(hào)： AD7730L
廠商： Analog Devices, Inc.
英文描述： Bridge Transducer ADC
中文描述： 橋傳感器模數(shù)轉(zhuǎn)換器
文件頁(yè)數(shù)： 46/52頁(yè)
文件大小： 497K
代理商： AD7730L
–46–
REV. A
Parameter
B Version
1
Units
Conditions/Comments
LOGIC INPUT S
Input Current
All Inputs Except SCLK and MCLK IN
V
INL
, Input Low Voltage
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
SCLK Only (Schmitt T rigerred Input)
V
T +
V
T +
V
T –
V
T –
V
T +
– V
T –
V
T +
– V
T –
MCLK IN Only
V
INL
, Input Low Voltage
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
V
INH
, Input High Voltage
±
10
μ
A max
0.8
0.4
2.0
V max
V max
V min
DV
DD
= +5 V
DV
DD
= +3 V
1.4/3
1/2.5
0.8/1.4
0.4/1.1
0.4/0.8
0.4/0.8
V min to V max
V min to V max
V min to V max
V min to V max
V min to V max
V min to V max
DV
DD
= +5 V
DV
DD
= +3 V
DV
DD
= +5 V
DV
DD
= +3 V
DV
DD
= +5 V
DV
DD
= +3 V
0.8
0.4
3.5
2.5
V max
V max
V min
V min
DV
DD
= +5 V
DV
DD
= +3 V
DV
DD
= +5 V
DV
DD
= +3 V
LOGIC OUT PUT S (Including MCLK OUT )
V
OL
, Output Low Voltage
I
SINK
= 800
μ
A Except for MCLK OUT
14
;
V
DD15
= +5 V
I
SINK
= 100
μ
A Except for MCLK OUT
14
;
V
DD15
= +3 V
I
SDD15
= 200
μ
A Except for MCLK OUT
14
;
V
= +5 V
I
SOURCE
= 100
μ
A Except for MCLK OUT
14
;
V
DD15
= +3 V
0.4
V max
V
OL
, Output Low Voltage
0.4
V max
V
OH
, Output High Voltage
4.0
V min
V
OH
, Output High Voltage
V
DD
– 0.6 V
±
10
9
V min
μ
A max
pF typ
Floating State Leakage Current
Floating State Output Capacitance
2
T RANSDUCER BURNOUT
AIN1(+) Current
AIN1(–) Current
Initial T olerance @ 25
°
C
Drift
2
–100
100
±
10
0.1
nA nom
nA nom
% typ
%/
°
C typ
OFFSET (T ARE) DAC
Resolution
LSB Size
DAC Drift
16
DAC Drift vs. T ime
4, 16
Differential Linearity
6
2.3/2.6
3.5
25
–0.25/+0.75
Bit
mV min/mV max
ppm/
°
C max
ppm/1000 Hours typ
LSB max
2.5 mV Nominal with 5 V Reference (REF IN/2000)
Guaranteed Monotonic
SYST EM CALIBRAT ION
Positive Full-Scale Calibration Limit
17
1.05
×
FS
V max
FS Is the Nominal Full-Scale Voltage
(10 mV, 20 mV, 40 mV or 80 mV)
Negative Full-Scale Calibration Limit
17
Offset Calibration Limit
18
Input Span
17
–1.05
×
FS
–1.05
×
FS
0.8
×
FS
2.1
×
FS
V max
V max
V min
V max
POWER REQUIREMENT S
Power Supply Voltages
AV
DD
– AGND Voltage
DV
DD
Voltage
Power Supply Currents
AV
DD
Current (Normal Mode)
+4.75 to +5.25
+2.7 to +5.25
V min to V max
V min to V max
With AGND = 0 V
External MCLK . Digital I/Ps = 0 V or DV
DD
All Input Ranges Except 0 mV to +10 mV and
±
10 mV,
T ypically 2.7 mA
Input Ranges of 0 mV to +10 mV and
±
10 mV Only,
T ypically 4 mA
DV
DD
of 2.7 V to 3.3 V, T ypically 0.3 mA
DV
DD
of 4.75 V to 5.25 V, T ypically 0.75 mA
T ypically 13
μ
A. External MCLK IN = 0 V or DV
DD
AV
DD
= DV
DD
= +5 V. Digital I/Ps = 0 V or DV
DD
All Input Ranges Except 0 mV to +10 mV and
±
10 mV,
T ypically 15 mW
Input Ranges of 0 mV to +10 mV and
±
10 mV Only,
T ypically 23.75 mW
T ypically 65
μ
W. External MCLK IN = 0 V or DV
DD
3.7
mA max
AV
DD
Current (Normal Mode)
5.5
mA max
DV
DD
Current (Normal Mode)
DV
DD
Current (Normal Mode)
AV
DD
+ DV
DD
Current (Standby Mode)
Power Dissipation
Normal Mode
0.45
1
21
mA max
mA max
μ
A max
23.5
mW max
32.5
mW max
Standby Mode
105
μ
W max
AD7730/AD7730L
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參數(shù)描述
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