參數(shù)資料
型號: AD7730L
廠商: Analog Devices, Inc.
英文描述: Bridge Transducer ADC
中文描述: 橋傳感器模數(shù)轉(zhuǎn)換器
文件頁數(shù): 23/52頁
文件大小: 497K
代理商: AD7730L
AD7730/AD7730L
REV. A
–23–
CIRCUIT DE SCRIPT ION
T he AD7730 is a sigma-delta A/D converter with on-chip digital
filtering, intended for the measurement of wide dynamic range,
low-frequency signals such as those in weigh-scale, strain-gage,
pressure transducer or temperature measurement applications.
It contains a sigma-delta (or charge-balancing) ADC, a calibra-
tion microcontroller with on-chip static RAM, a clock oscillator,
a digital filter and a bidirectional serial communications port.
T he part consumes 13 mA of power supply current with a standby
mode which consumes only 25
μ
A. T he part operates from a single
+5 V supply. T he clock source for the part can be provided via an
external clock or by connecting a crystal oscillator or ceramic
resonator across the MCLK IN and MCLK OUT pins.
T he part contains two programmable-gain fully differential analog
input channels. T he part handles a total of eight different input
ranges which are programmed via the on-chip registers. T here are
four differential unipolar ranges: 0 mV to +10 mV, 0 mV to
+20 mV, 0 mV to +40 mV and 0 mV to +80 mV and four differen-
tial bipolar ranges:
±
10 mV,
±
20 mV,
±
40 mV and
±
80 mV.
T he AD7730 employs a sigma-delta conversion technique to
realize up to 24 bits of no missing codes performance. T he
sigma-delta modulator converts the sampled input signal into a
digital pulse train whose duty cycle contains the digital informa-
tion. A digital low-pass filter processes the output of the sigma-
delta modulator and updates the data register at a rate that can
be programmed over the serial interface. T he output data from
the part is accessed over this serial interface. T he cutoff frequency
and output rate of this filter can be programmed via on-chip
registers. T he output noise performance and peak-to-peak reso-
lution of the part varies with gain and with the output rate as
shown in T ables I to IV.
T he analog inputs are buffered on-chip allowing the part to
handle significant source impedances on the analog input. T his
means that external R, C filtering (for noise rejection or RFI
reduction) can be placed on the analog inputs if required. Both
analog channels are differential, with a common-mode voltage
range that comes within 1.2 V of AGND and 0.95 V of AV
DD
.
T he reference input is also differential and the common-mode
range here is from AGND to AV
DD
.
T he part contains a 6-bit DAC that is controlled via on-chip
registers. T his DAC can be used to remove T ARE values of up
to
±
80 mV from the analog input signal range. T he resolution
on this T ARE function is 1.25 mV for a +2.5 V reference and
2.5 mV with a +5 V reference.
T he AD7730 can accept input signals from a dc-excited bridge.
It can also handle input signals from an ac-excited bridge by
using the ac excitation clock signals (ACX and
ACX
) to switch
the supplies to the bridge. ACX and
ACX
are nonoverlapping
clock signals used to synchronize the external ac supplies that
drive the transducer bridge. T hese ACX clocks are demodulated
on the AD7730 input.
T he AD7730 contains a number of hardware and software
events that set or reset status flags and bits in registers. T able
X VIII summarizes which blocks and flags are affected by the
different events.
T able X VIII. Reset E vents
Set Registers
to Default
Mode
Bits
Filter
Reset
Analog
Power-Down
Reset Serial
Interface
Set
RDY
Pin/Bit
Set
STDY
Bit
E vent
Power-On Reset
RESET
Pin
STANDBY
Pin
Mode 011 Write
SYNC
Pin
Mode 000 Write
Conversion or
Cal Mode Write
Clock 32 1s
Data Register Read
Yes
Yes
No
No
No
No
No
000
000
As Is
011
As Is
000
New
Value
000
As Is
Yes
Yes
Yes
Yes
Yes
Yes
Initial
Reset
Yes
No
Yes
No
Yes
Yes
No
No
No
Yes
Yes
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
Yes
No
Yes
Yes
Yes
No
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