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參數(shù)資料
| 型號： | AD7725 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 16-Bit 900 kSPS ADC with a Programmable Postprocessor |
| 中文描述： | 16位900 ksps模數(shù)轉換器的可編程后處理器 |
| 文件頁數(shù)： | 2/28頁 |
| 文件大?。?/td> | 442K |
| 代理商： | AD7725 |
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REV. A
–2–
AD7725–SPECIFICATIONS
1
(AV
DD
= 5 V
5%, AGND = AGND1 = AGND2 = DGND
= 0 V,
f
CLKIN2
= 9.6 MHz, REF2 = 2.5 V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
B Version
Typ
Parameter
Test Conditions/Comments
Min
Max
Unit
DYNAMIC SPECIFICATIONS
When tested with the FIR filter in
Figure 1, HALF_PWR = Logic High
Bipolar Mode
Signal-to-Noise
3
Measurement Bandwidth = 0.5 f
O4
2.5 V Reference
3 V Reference
77
79
83
85
–94
–98
dB
dB
dB
dB
Total Harmonic Distortion
3, 5
Spurious Free Dynamic Range
3, 5
Unipolar Mode
Signal-to-Noise
3
Total Harmonic Distortion
3, 5
–86
–89
Measurement Bandwidth = 0.5 f
O4
83
–94
dB
dB
ANALOG INPUTS
Full-Scale Input Span
Bipolar Mode
Unipolar Mode
Absolute Input Voltage
Input Sampling Capacitance
Input Sampling Rate, f
CLKIN
CLOCK
CLKIN Duty Ratio
V
IN
(+) – V
IN
(–)
Differential or Single-Ended Input
Single-Ended Input
V
IN
(+) and/or V
IN
(–)
±
4/5 V
REF2
8/5 V
REF2
AV
DD
V
V
V
pF
MHz
0
AGND
2
14.4
6
45
55
%
REFERENCE
REF1 Output Resistance
Reference Buffer
Offset Voltage
Using Internal Reference
REF2 Output Voltage
REF2 Output Voltage Drift
Using External Reference
REF2 Input Impedance
REF2 External Voltage Input
7
3.5
k
Offset between REF1 and REF2
±
3
mV
2.39
2.54
60
2.69
V
ppm/
°
C
REF1 = AGND
8
2.5
k
V
STATIC PERFORMANCE
Resolution
Differential Nonlinearity (DNL)
3
Integral Nonlinearity (INL)
3
DC CMRR
Offset Error
Gain Error
3, 9
16
Bits
LSB
LSB
dB
mV
%FSR
Guaranteed Monotonic
±
0.5
±
2
80
±
20
±
0.5
±
1
8
LOGIC INPUTS (Excluding CLKIN)
V
INH
, Input High Voltage
V
INL
, Input Low Voltage
CLOCK INPUT (CLKIN)
V
INH
, Input High Voltage
V
INL
, Input Low Voltage
2.0
V
V
0.8
0.7 DV
DD
V
V
0.3 DV
DD
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