參數(shù)資料
型號(hào): AD7690
廠商: Analog Devices, Inc.
英文描述: 16-Bit, +/-0.65 LSB INL, 500 kSPS PulSAR Differential ADC in MSOP/QFN
中文描述: 16位/ -0.65 LSB INL和500 kSPS的PulSAR系列差分ADC,采用MSOP / QFN封裝
文件頁(yè)數(shù): 21/24頁(yè)
文件大小: 449K
代理商: AD7690
Preliminary Technical Data
AD7693
CHAIN MODE, NO BUSY INDICATOR
This mode can be used to daisy-chain multiple AD7693s on
a 3-wire serial interface. This feature is useful for reducing
component count and wiring connections, for example, in
isolated multiconverter applications or for systems with a
limited interfacing capacity. Data readback is analogous to
clocking a shift register.
Rev. PrB | Page 21 of 24
A connection diagram example using two AD7693s is shown in
Figure 41, and the corresponding timing is given in Figure 42.
When SDI and CNV are low, SDO is driven low. With SCK low,
a rising edge on CNV initiates a conversion, selects the chain
mode, and disables the busy indicator. In this mode, CNV is
held high during the conversion phase and the subsequent data
readback. When the conversion is complete, the MSB is output
onto SDO and the AD7693 enters the acquisition phase and
powers down. The remaining data bits stored in the internal
shift register are clocked by subsequent SCK falling edges. For
each ADC, SDI feeds the input of the internal shift register and
is clocked by the SCK falling edge. Each ADC in the chain
outputs its data MSB first, and 16 × N clocks are required to
read back the N ADCs. The data is valid on both SCK edges.
Although the rising edge can be used to capture the data, a
digital host using the SCK falling edge will allow a faster
reading rate and consequently more AD7693s in the chain,
provided the digital host has an acceptable hold time. The
maximum conversion rate can be reduced due to the total
readback time.
CLK
CONVERT
DATA IN
DIGITAL HOST
CNV
SCK
SDO
SDI
CNV
SCK
SDO
SDI
AD7693
B
AD7693
A
-
Figure 41. Chain Mode Without Busy Indicator Connection Diagram
SDO
A
= SDI
B
D
A
15
D
A
14
D
A
13
SCK
1
2
3
30
31
32
t
SSDISCK
t
HSDISC
t
EN
CONVERSION
ACQUISITION
t
CONV
t
CYC
t
ACQ
ACQUISITION
CNV
D
A
1
14
15
t
SCK
t
SCKL
t
SCKH
D
A
0
17
18
16
SDI
A
= 0
SDO
B
D
B
15
D
B
14
D
B
13
D
A
1
D
B
1
D
B
0
D
A
15
D
A
14
t
HSDO
t
DSDO
t
SSCKCNV
t
HSCKCNV
D
A
0
-
Figure 42. Chain Mode Without Busy Indicator Serial Interface Timing
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