參數(shù)資料
型號: AD768AR
廠商: Analog Devices Inc
文件頁數(shù): 6/20頁
文件大小: 0K
描述: IC DAC 16BIT 30MSPS 28-SOIC
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
設置時間: 25ns
位數(shù): 16
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
電壓電源: 雙 ±
功率耗散(最大): 600mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 28-SOIC W
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 40M
REV. B
–14–
AD768
AD768 IN MULTITONE TRANSMITTERS (FOR ADSL)
Communications applications frequently require aspects of
component performance that differ significantly from the
simple, single tone signals used in typical SNR and THD tests.
This is particularly true for spread-spectrum and frequency divi-
sion multiplexed (FDM) type signals, where information con-
tent is held in a number of small signal components spread
across the frequency band. In these applications, a combination
of wide dynamic range, good fine-scale linearity, and low inter-
modulation distortion is required. Unfortunately, a part’s full
scale SNR and THD performance may not be a reliable indica-
tor of how it will perform in these multitone applications.
One example of an FDM communications system is the DMT
(discrete multitone) ADSL (Asymmetrical Digital Subscriber
Line) standard currently being considered by ANSI. Figure 33
shows a block diagram of a transmitter function.
The digital bits are used to QAM modulate each of approxi-
mately 200 discrete tones. An inverse FFT turns this modu-
lated frequency domain information into 512 time points at a
2.2 MSPS sample rate. These time points are then put through
an FIR interpolation filter to upsample (in this case to 4.4 MSPS).
The bit stream is run through the AD768, which is followed by
a 4th order analog smoothing filter, then run to the line-driving
circuitry
TO
TRANSMITTER
BIT
STREAM
QAM
ENCODER
256
MODULATED
FREQUENCY
BINS
512 TIME
POINTS
@ 2.2MSPS
1024 TIME
POINTS
@ 4.4MSPS
4TH ORDER
SMOOTHING
FILTER
AD768
+BUFFER
2X
INTERPOLATOR
FIR
INVERSE
FFT
Figure 33. Typical DMT ADSL Transmit Chain
Figure 34a shows a frequency domain representation of a test
vector run through this system, while 34b shows the time do-
main representation. (Clearly the frequency domain picture is
more informative.) We wish to optimize the SINAD of each
4 kHz frequency band: this is a function of both noise
(wideband and quantization) and distortion (simple harmonic
and intermod).
OUTPUT
dB
FREQUENCY – Hz
0
–20
–40
–60
0
1.1M
–80
Figure 34a. Output Spectrum of ADSL Test Vector
TIME – 25s/DIV
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
OUTPUT
Volts
Figure 34b. Time Domain Output Signal of ADSL Test
Vector
Table I and II show the available SNR and THD at the output
of the filter vs. frequency bin for the ADSL application. The
AD768’s combination of 16-bit dynamic range and 14-bit lin-
earity provides excellent performance for the DMT signal. Its
fast input rate would support even faster rates of oversampling,
if one were interested in trading off digital filter complexity in
the interpolator for a simplified analog filter.
Table I. SNR vs. Frequency
Frequency
SNR
151 kHz
70.1 dB
349 kHz
69.7 dB
500 kHz
69.4 dB
1 MHz
69.8 dB
Table II. THD vs. Frequency
Frequency
THD
160 kHz
–68.9 dBc
418 kHz
–64.0 dBc
640 kHz
–64.3 dBc
893 kHz
–63.8 dBc
相關PDF資料
PDF描述
AD7724ASTZ IC MOD SIGMA-DELTA DUAL 48LQFP
AD7729ARU IC ADC 15BIT DUAL W/DAC 28-TSSOP
AD7746ARUZ IC CONV 2CH CAP TO DGTL 16-TSSOP
AD7747ARUZ-REEL7 IC CONV CAP TO DIG 24BIT 16TSSOP
AD7808BR IC DAC 10BIT 3.3V OCTAL 24-SOIC
相關代理商/技術參數(shù)
參數(shù)描述
AD768AR-REEL 制造商:Analog Devices 功能描述:DAC 1-CH R-2R/Current Steering 16-bit 28-Pin SOIC W T/R
AD768ARZ 功能描述:IC DAC 16BIT 30MSPS 28-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 標準包裝:1 系列:- 設置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行,SPI? 轉換器數(shù)目:1 電壓電源:單電源 功率耗散(最大):- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 供應商設備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓,單極;1 電壓,雙極 采樣率(每秒):* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND
AD768ARZ-REEL 功能描述:IC DAC 16BIT 30MSPS 28-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 電壓電源:雙 ± 功率耗散(最大):100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC(J 形引線) 供應商設備封裝:28-PLCC(11.51x11.51) 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓,單極;1 電壓,雙極 采樣率(每秒):143k
AD768-EB 制造商:Analog Devices 功能描述:IC, 16-BIT 32 MSPS DAC - Bulk
AD768-EBZ 制造商:Analog Devices 功能描述:EVAL BOARD - Boxed Product (Development Kits)