IREFIN – mA POWER – mW 550 500 300 1.0 7.0 2.0 3.0 4.0 5.0 6.0 " />
參數(shù)資料
型號(hào)： AD768AR
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 17/20頁(yè)
文件大?。?/td> 0K
描述： IC DAC 16BIT 30MSPS 28-SOIC
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1
設(shè)置時(shí)間： 25ns
位數(shù)： 16
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 雙 ±
功率耗散（最大）： 600mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 28-SOIC W
包裝： 管件
輸出數(shù)目和類型： 2 電流，單極；2 電流，雙極
采樣率（每秒）： 40M
REV. B
–6–
AD768
IREFIN – mA
POWER
–
mW
550
500
300
1.0
7.0
2.0
3.0
4.0
5.0
6.0
450
400
350
Figure 3. Power Dissipation vs. IREFIN Current
Note the AD768 is optimized for operation at an input current
of 5 mA. Both linearity and dynamic performance at other input
currents may be somewhat degraded. Figure 4 shows typical dc
linearity over a range of input currents. Figure 5 shows typical
SFDR (to Nyquist) performance over a range of input currents
and CLOCK input rates for a 1 MHz output frequency.
ERROR
–
LSB
IREFIN – mA
10
0
1.0
7.0
2.0
3.0
4.0
5.0
6.0
9
6
3
2
1
8
7
5
4
INL
DNL
Figure 4. INL/DNL vs. IREFIN Current
IREFIN – mA
SFDR
–
dB
–85
–55
1.0
7.0
2.0
3.0
4.0
5.0
6.0
–80
–75
–70
–65
–60
CLOCK = 10 MSPS
CLOCK = 20 MSPS
CLOCK = 30 MSPS
CLOCK = 40 MSPS
Figure 5. SFDR (to Nyquist) vs. IREFIN @ FOUT = 1 MHz
DAC TRANSFER FUNCTION
The AD768 may be used in either current-output mode with the
output connected to a virtual ground, or voltage-output mode
with the output connected to a resistive load.
In current output mode,
IOUT = (DAC CODE/65536)
× (I
REFIN
× 4)
In voltage output mode,
VOUT = IOUT
× R
LOAD RLAD
where:
DAC CODE is the decimal representation of the DAC inputs;
an integer between 0 and 65535.
IREFIN is the current applied at the IREFIN pin, determined by
VREF/RREF.
Substituting for IOUT and IREFIN,
VOUT = –VREF
× (DAC CODE/65536) × 4 × [(R
LOAD RLAD)/RREF]
These equations clarify an important aspect of the AD768
transfer function; the full-scale current output of the DAC is
proportional to a current input. The voltage output is then a
function of the ratio of (RLOAD RLAD)/RREF, allowing for cancel-
lation of resistor drift by selection of resistors with matched
characteristics.
REFERENCE INPUT
The IREFIN pin is a current input node with low impedance to
REFCOM. This input current sets the magnitude of the DAC
current sources such that the full-scale output current is exactly
four times the current applied at IREFIN. For the nominal in-
put current of 5 mA, the nominal full-scale output current is
20 mA.
The 5 mA reference input current can be generated from the
on-chip 2.5 V reference with an external resistor of 500
from
REFOUT to IREFIN. If desired, a variety of external reference
voltages may be used based on the selection of an appropriate
resistor. However, to maintain stability of the reference ampli-
fier, the external impedance at IREFIN must be kept below
1k
.
5
6
REFCOM
IREFIN
VEE
IFB
5mA
Figure 2. Equivalent Reference Input Circuit
The IREFIN current can be varied from 1 mA to 7 mA which
subsequently will result in a proportional change in the DAC
full-scale. Since the operating currents within the DAC vary
with IREFIN, so does the power dissipation. Figure 3 illustrates
that relationship.
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