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參數(shù)資料
| 型號： | AD7626BCPZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT 10MSPS DIFF 32LFCSP |
| 設(shè)計(jì)資源： | Single-Ended-to-Differential High Speed Drive Circuit for 16-Bit, 10 MSPS AD7626 ADC (CN0105) |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 10M |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 170mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個單端，單極；1 個差分，雙極 |
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Data Sheet
AD7626
Rev. B | Page 21 of 28
Wake-Up Time from EN1= 0, EN0 = 0
The AD7626 powers down when EN1 and EN0 are both set to
0. Selecting the correct reference choice from power-down, the
user sets EN1 and EN0 to the required value shown in Table 8.
The user may immediately apply CNV pulses to receive data
conversion results. Typical wake-up times for the selected
reference settings are shown in Table 9. Each time represents
the duration from the EN1, EN0 logic transition to when the
output of the ADC is settled to 0.5 LSB accuracy.
Table 9. Wake-Up Time from EN1=0, EN0 = 0
Reference Mode
EN1
EN0
Wake-Up
Time (0.5 LSB
Accuracy)
A
Power-up
Internal reference and inter-
nal reference buffer in use
1
9.5 sec
B
External 1.2 V reference
applied to REFIN pin
0
1
25 ms
C
External 4.096 V reference
applied to REF pin
1
0
65 s
POWER SUPPLY
The AD7626 uses both 5 V (VDD1) and 2.5 V (VDD2) power
supplies, as well as a digital input/output interface supply (VIO).
VIO allows a direct interface with 2.5 V logic only. VIO and
VDD2 can be taken from the same 2.5 V source; however, it is
best practice to isolate the VIO and VDD2 pins using separate
traces as well as to decouple each pin separately.
The 5 V and 2.5 V supplies required for the AD7626 can be
generated using Analog Devices, Inc., LDOs such as the
50
55
60
65
70
75
80
85
90
1
10
100
1k
10k
SUPPLY FREQUENCY (Hz)
P
S
RR
(
d
B)
INTERNAL REFERENCE USED
VDD2
VDD1
07648-
011
Figure 38. PSRR vs. Supply Frequency
(350 mV pp Ripple on VDD2, 600 mV Ripple on VDD1)
Power-Up
When powering up the AD7626 device, first apply the 2.5 V
VDD2 supply and VIO voltage to the device. After the VIO and
2.5 V VDD2 have been established, apply the 5 V VDD1 supply.
If using an external reference with the AD7626, ensure that the
EN0 and EN1 pins are connected to the correct logic values
associated with the reference option of choice and then apply
the external reference voltage. Finally, apply the analog inputs to
the ADC.
25
20
15
10
5
0
10
8
6
4
2
CURRE
NT
(
mA)
THROUGHPUT (MSPS)
07648-
235
VDD1 EXTERNAL
REFERENCE
VDD1 INTERNAL
REFERENCE
VDD2 INTERNAL
REFERENCE
VDD2 EXTERNAL
REFERENCE
VIO EXTERNAL
REFERENCE
VIO INTERNAL
REFERENCE
Figure 39. Current Consumption vs. Sampling Rate
160
140
120
100
80
60
40
20
0
10
9
8
7
6
5
4
3
2
1
PO
W
ER
(m
W
)
THROUGHPUT (MSPS)
07648-
236
INTERNAL REFERENCE
EXTERNAL REFERENCE
Figure 40. Power Dissipation vs. Sampling Rate
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