參數資料
型號: AD7625BCPZRL7
廠商: Analog Devices Inc
文件頁數: 10/24頁
文件大小: 0K
描述: IC ADC 16BIT 6MSPS SAR 32LFCSP
設計資源: High Speed, Precision, Differential AC-Coupled Drive Circuit for AD7625 (CN0080)
標準包裝: 1,500
系列: PulSAR®
位數: 16
采樣率(每秒): 6M
數據接口: 串行
轉換器數目: 1
功率耗散(最大): 190mW
電壓電源: 模擬和數字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應商設備封裝: 32-LFCSP-VQ(5x5)
包裝: 帶卷 (TR)
輸入數目和類型: 1 個差分,雙極
AD7625
Data Sheet
Rev. A | Page 18 of 24
POWER SUPPLY
The AD7625 uses both 5 V (VDD1) and 2.5 V (VDD2) power
supplies, as well as a digital input/output interface supply (VIO).
VIO allows a direct interface with 2.5 V logic only. VIO and
VDD2 can be taken from the same 2.5 V source; however, it is
best practice to isolate the VIO and VDD2 pins using separate
traces and also to decouple each pin separately.
The 5 V and 2.5 V supplies required for the AD7625 can be
generated using Analog Devices, Inc., low dropout regulators
(LDOs) such as the ADP3330-2.5, ADP3330-5, ADP3334, and
50
55
60
65
70
75
80
85
90
1
10
100
1k
10k
VDD2
VDD1
07652-
011
SUPPLY FREQUENCY (Hz)
P
S
RR
(
d
B)
INTERNAL REFERENCE USED
Figure 26. PSRR vs. Supply Frequency
(350 mV pp Ripple on VDD2, 600 mV Ripple on VDD1)
Power-Up
When powering up the AD7625 device, first apply the VIO
voltage to the device so that the EN1 and EN0 values can be set
for the reference option in use. Connect the EN0 and EN1 pins
to pull-up/pull-down resistors to ensure that one or both of
these pins is set to a nonzero value. EN0 = 0 and EN1 = 0 is an
illegal state that must be avoided.
After VIO is established, apply the 2.5 V VDD2 supply to the
device followed by the 5 V VDD1 supply and then an external
reference (depending on the reference setting being used).
Finally, apply the analog inputs to the ADC.
07652-
016
SAMPLING RATE (kSPS)
CURRE
NT
(
mA)
0
5
10
15
20
25
0
1000
2000
3000
4000
5000
6000
7000
VDD2 INTERNAL REF
VDD2 EXTERNAL REF
VDD1 EXTERNAL REF
VDD1 INTERNAL REF
VIO
Figure 27. Current Consumption vs. Sampling Rate
07652-
017
SAMPLING RATE (kSPS)
PO
W
ER
D
ISSI
PA
T
IO
N
(m
W
)
0
1000
2000
3000
4000
5000
6000
7000
60
70
80
90
100
110
120
130
140
150
INTERNAL REF
EXTERNAL REF
Figure 28. Power Dissipation vs. Sampling Rate
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