參數(shù)資料
型號: AD7609BSTZ
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 8-CH 18-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PQFP64
封裝: ROHS COMPLIANT, MS-026BCD, LQFP-64
文件頁數(shù): 19/35頁
文件大?。?/td> 1737K
代理商: AD7609BSTZ
AD7609
Preliminary Technical Data
Rev. PrD | Page 26 of 35
CONVERSION CONTROL
Simultaneous Sampling on All Analog Input Channels
The AD7609 allows simultaneous sampling of all analog input
channels. All channels are sampled simultaneously when both
CONVST x pins (CONVST A, CONVST B) are tied together. A
single CONVST x signal is used to control both CONVST x inputs.
The rising edge of this common CONVST x signal initiates
simultaneous sampling on all analog input channels.
The AD7609 contains an on-chip oscillator that is used to
perform the conversions. The conversion time for all ADC
channels is tCONV. The BUSY signal indicates to the user when
conversions are in progress, so when the rising edge of
CONVST x is applied, BUSY goes logic high, and transitions low
at the end of the entire conversion process. The falling edge of
the BUSY signal is used to place all eight track-and-hold
amplifiers back into track mode. The falling edge of BUSY also
indicates that the new data may now be read from the parallel
bus (DB[15:0]) or serial data lines DOUTA and DOUTB.
Simultaneously Sampling Two Sets of Channels
The AD7609 also allows the analog input channels to be
sampled simultaneously in two sets. This can be used in power
line protection and measurement systems to compensate for
phase differences between PT and CT transformers.
This is accomplished by pulsing the two CONVST x pins inde-
pendently and is only possible if oversampling is not in use.
CONVST A is used to initiate simultaneous sampling the first
set of channels (V1 to V4), CONVST B is used to initiate
simultaneous sampling on the second set of analog input
channels, (V5 to V8) as illustrated in Figure 43. On the rising
edge of CONVST A, the track-and-hold amplifiers for the first
set of channels are placed into hold mode. On the rising edge
of CONVST B, the track-and-hold amplifiers for the second set
of channels are placed into hold mode. The conversion process
begins once both rising edges of CONVST x have occurred;
therefore, BUSY will go high on the rising edge of the later
CONVST x signal. The falling edge of BUSY also indicates that
the new data may now be read from the parallel bus or the serial
data lines DOUTA and DOUTB. There is no change to the data read
process when using two separate CONVST x signals.
Connect all unused analog input channel to AGND. The results
for any unused channels are still included in the data read as all
channels are always converted.
09
76
0-
03
9
CONVST A
CONVST B
BUSY
CS, RD
DATA: DB[15:0]
FRSTDATA
t5
tCONV
V1 TO V4 TRACK-AND-HOLD
ENTER HOLD
V5 TO V8 TRACK-AND-HOLD
ENTER HOLD
AD7608 CONVERTS
ON ALL 8 CHANNELS
V1
V8
V2
Figure 43. Simultaneous Sampling on Channel Sets Using Independent CONVST A/CONVST B Signals—Parallel Mode
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