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參數(shù)資料
| 型號： | AD7466BRT |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO6 |
| 封裝： | MO-178AB, SOT-23, 6 PIN |
| 文件頁數(shù)： | 2/24頁 |
| 文件大小： | 327K |
| 代理商： | AD7466BRT |
–10–
REV. PrF
PRELIMINARY TECHNICAL DATA
AD7466/AD7467/AD7468
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line pass-
ing through the endpoints of the ADC transfer function.
For the AD7466/67/68 the endpoints of the transfer
function are zero scale, a point 1 LSB below the first
code transition, and full scale, a point 1 LSB above the
last code transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1
LSB change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00 . . .
000) to (00 . . . 001) from the ideal, i.e AGND + 1
LSB.
Gain Error
This is the deviation of the last code transition (111 . . .
110) to (111 . . . 111) from the ideal (i.e., VREF – 1LSB)
after the offset error has been adjusted out.
Track/Hold Acquisition Time
The Track/Hold acquisition time is the time required
for the part to acquire a worse case input value within
±0.5 LSB. For the AD7466/67/68 the part enters Track
mode on the
CS falling edge and it returns to Hold
mode on the third SCLK falling edge. The part remains
in Hold mode until the following
CS falling edge.
See Figure 3 and the Serial interface section for more
details.
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distor-
tion) at the output of the A/D converter. The signal is
the rms amplitude of the fundamental. Noise is the sum
of all nonfundamental signals up to half the sampling
frequency (fS/2), excluding dc. The ratio is dependent on
the number of quantization levels in the digitization
process; the more levels, the smaller the quantization
noise. The theoretical signal to (noise + distortion) ratio
for an ideal N-bit converter with a sine wave input is
given by:
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB
Thus for a 12-bit converter, this is 74 dB and for a 10-
bit converter this is 62dB.
Total Unadjusted Error
This is a comprehensive specification which includes gain
error, linearity error and offset error.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms
sum of harmonics to the fundamental. For the AD7466/
AD7467/AD7468, it is defined as:
where V1 is the rms amplitude of the fundamental and V2,
V3, V4, V5 and V6 are the rms amplitudes of the second
through the sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of
the rms value of the next largest component in the ADC
output spectrum (up to fS/2 and excluding dc) to the rms
value of the fundamental. Normally, the value of this
specification is determined by the largest harmonic in the
spectrum, but for ADCs where the harmonics are buried
in the noise floor, it will be a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa
and fb, any active device with nonlinearities will create
distortion products at sum and difference frequencies of
mfa ± nfb where m, n = 0, 1, 2, 3, etc. Intermodulation
distortion terms are those for which neither m nor n are
equal to zero. For example, the second order terms in-
clude (fa + fb) and (fa – fb), while the third order terms
include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb).
The AD7466/AD7467/AD7468 are tested using the CCIF
standard where two input frequencies are used. In this
case, the second order terms are usually distanced in fre-
quency from the original sine waves while the third order
terms are usually at a frequency close to the input frequen-
cies. As a result, the second and third order terms are
specified separately. The calculation of the
intermodulation distortion is as per the THD specification
where it is the ratio of the rms sum of the individual dis-
tortion products to the rms amplitude of the sum of the
fundamentals expressed in dBs.
THD (dB )
= 20 log
V2
2 +V
3
2 +V
4
2 +V
5
2 +V
6
2
V1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7467BRT | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
| AD7468BRT | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
| AD7466 | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
| AD7467 | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
| AD7468 | 1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7466BRT-R | 制造商:AD 制造商全稱:Analog Devices 功能描述:1.6 V, Micropower 12-/10-/8-Bit ADCs |
| AD7466BRT-R2 | 功能描述:IC ADC 12BIT 1.6V LP SOT23-6 RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7466BRT-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 12-bit Serial 6-Pin SOT-23 T/R |
| AD7466BRT-REEL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1.6 V, Micropower 12-/10-/8-Bit ADCs |
| AD7466BRTZ-R | 制造商:AD 制造商全稱:Analog Devices 功能描述:1.6 V, Micropower 12-/10-/8-Bit ADCs |
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