AD7457
Rev. A | Page 12 of 20
VIN+
VIN–
VDD
SCLK
SDATA
CS
GND
VREF
SERIAL
INTERFACE
+2.7V TO +5.25V
SUPPLY
2.5V
AD780
AD7457
VREF
P-TO-P
DC INPUT
VOLTAGE
C/P
03157-
0-
006
0.1
F10F
0.33
F
Figure 17. Typical Connection Diagram
ANALOG INPUT
The AD7457 has a pseudo differential analog input. The VIN+
input is coupled to the signal source and should have an ampli-
tude of VREF p-p to make use of the full dynamic range of the
part. A dc input is applied to the VIN. The voltage applied to this
input provides an offset from ground or a pseudo ground for
the VIN+ input. Ensure that (VIN + VIN+) is less than or equal to
VDD to avoid exceeding the maximum ratings of the ADC. The
main benefit of pseudo differential inputs is that they separate
the analog input signal ground from the ADC’s ground, allow-
ing dc common-mode voltages to be canceled.
Because the ADC operates from a single supply, it is necessary
to level shift ground-based bipolar signals to comply with the
input requirements. An op amp (for example, the AD8021) can
be configured to rescale and level shift a ground-based (bipolar)
signal, so that it is compatible with the input range of the
When a conversion takes place, the pseudo ground corresponds
to 0 and the maximum analog input corresponds to 4096.
EXTERNAL
VREF (2.5V)
R
VIN+
VIN–
AD7457
2.5V
1.25V
0V
VREF
+1.25V
0V
–1.25V
VIN
R
3R
0.33
F
R
03157-0-007
Figure 18. Op Amp Configuration to Level Shift a Bipolar Input Signal
ANALOG INPUT STRUCTURE
structure of the AD7457. The four diodes provide ESD protec-
tion for the analog inputs. Care must be taken to ensure that the
analog input signals never exceed the supply rails by more than
300 mV, which causes these diodes to become forward biased
and start conducting into the substrate. These diodes can con-
duct up to 10 mA without causing irreversible damage to the
part. Typically, the C1 capacitors in
Figure 19 are 4 pF and can
be attributed primarily to pin capacitance. The resistors are
lumped components made up of the on resistance of the
switches. The value of these resistors is typically about 100 .
The capacitors, C2, are the ADC’s sampling capacitors, which
typically have a capacitance of 16 pF.
For ac applications, removing high frequency components from
the analog input signal through the use of an RC low pass filter
on the relevant analog input pins is recommended. In applica-
tions where harmonic distortion and the signal-to-noise ratio
are critical, the analog input should be driven from a low
impedance source. Large source impedances can significantly
affect the ac performance of the ADC, which may necessitate
the use of an input buffer amplifier. The choice of the op amp is
a function of the particular application.
VIN+
C1
C2
R1
D
VDD
VIN–
C1
C2
R1
D
VDD
03157-0-008
Figure 19. Equivalent Analog Input Circuit
(Conversion Phase, Switches Open; Track Phase, Switches Closed)
When no amplifier is used to drive the analog input, the
source impedance should be limited to low values. The maxi-
mum source impedance depends on the amount of total
harmonic distortion that can be tolerated. The THD increases
as the source impedance increases and performance degrades.
frequency for different source impedances.