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參數(shù)資料
| 型號： | AD7451ARMZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT DIFF 1MSPS 8MSOP |
| 標準包裝： | 50 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 9.25mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-MSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個偽差分，單極 |
AD7441/AD7451
Rev. D | Page 12 of 24
TERMINOLOGY
Signal-to-(Noise + Distortion) Ratio (SINAD)
This is the measured ratio of SINAD at the output of the ADC.
The signal is the rms amplitude of the fundamental. Noise is
the sum of all nonfundamental signals up to half the sampling
frequency (fS/2), excluding dc. The ratio is dependent on the
number of quantization levels in the digitization process: the more
levels, the smaller the quantization noise. The theoretical SINAD
ratio for an ideal N-bit converter with a sine wave input is given by
Signal-to-(Noise + Distortion) = (6.02 N + 1.76) dB
Therefore, for 12-bit converters, the SINAD is 74 dB; for 10-bit
converters, the SINAD is 62 dB.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of harmonics to the
fundamental. In the AD7441/AD7451, THD is
()
1
6
5
4
3
2
V
THD
2
log
20
dB
+
=
where:
V1 is the rms amplitude of the fundamental.
V2, V3, V4, V5, and V6 are the rms amplitudes of the second to
the sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic (spurious noise) is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2, excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is
determined by the largest harmonic in the spectrum, but for
ADCs where the harmonics are buried in the noise floor, it is
a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, an active device with nonlinearities creates distortion products
at sum and difference frequencies of mfa ± nfb where m, n = 0,
1, 2, 3, and so on. Intermodulation distortion terms are those in
which neither m nor n are equal to zero. For example, the second-
order terms include (fa + fb) and (fa fb), while the third-order
terms include (2fa + fb), (2fa fb), (fa + 2fb), and (fa 2fb).
The AD7441/AD7451 are tested using the CCIF standard where
two input frequencies near the top end of the input bandwidth
are used. In this case, the second-order terms are usually dis-
tanced in frequency from the original sine waves while the
third-order terms are usually at a frequency close to the input
frequencies. As a result, the second- and third-order terms
are specified separately. The calculation of the intermodulation
distortion is as per the THD specification where it is the ratio of
the rms sum of the individual distortion products to the rms
amplitude of the sum of the fundamentals expressed in decibels.
Aperture Delay
This is the amount of time from the leading edge of the
sampling clock until the ADC actually takes the sample.
Aperture Jitter
This is the sample-to-sample variation in the effective point in
time at which the actual sample is taken.
Full Power Bandwidth
The full power bandwidth of an ADC is that input frequency
at which the amplitude of the reconstructed fundamental is
reduced by 0.1 dB or 3 dB for a full-scale input.
Integral Nonlinearity (INL)
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function.
Differential Nonlinearity (DNL)
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (000…000 to
000…001) from the ideal (that is, AGND + 1 LSB).
Gain Error
This is the deviation of the last code transition (111…110 to
111…111) from the ideal (that is, VREF 1 LSB) after the offset
error has been adjusted out.
Track-and-Hold Acquisition Time
The track-and-hold acquisition time is the minimum time
required for the track-and-hold amplifier to remain in track
mode for its output to reach and settle to within 0.5 LSB of the
applied input signal.
Power Supply Rejection Ratio (PSRR)
The power supply rejection ratio is defined as the ratio of the
power in the ADC output at full-scale frequency (f) to the
power of a 100 mV p-p sine wave applied to the ADC VDD
supply of Frequency fS. The frequency of this input varies from
1 kHz to 1 MHz.
PSRR (dB) = 10log(Pf/Pfs)
where:
Pf is the power at Frequency f in the ADC output.
Pfs is the power at Frequency fs in the ADC output.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7451ART-R2 | 功能描述:IC ADC 12BIT W/DIFF INP SOT-23-8 RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7451ART-REEL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 12-bit Serial 8-Pin SOT-23 T/R 制造商:Rochester Electronics LLC 功能描述: |
| AD7451ARTZ-REEL7 | 功能描述:IC ADC 12BIT DIFF 1MSPS SOT23-8 RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD7451BRM | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 12-bit Serial 8-Pin MSOP 制造商:Analog Devices 功能描述:12BIT SAR ADC DIFF I/P SMD 7451 |
| AD7451BRM-REEL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 12-bit Serial 8-Pin MSOP T/R |
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