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參數(shù)資料
| 型號： | AD73322LARZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 33/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ANALOG FRONT END DUAL 28-SOIC |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 位數(shù)： | 16 |
| 通道數(shù)： | 4 |
| 功率（瓦特）： | 73mW |
| 電壓 - 電源，模擬： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，數(shù)字： | 2.7 V ~ 5.5 V |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 管件 |
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AD73322L
Rev. A | Page 39 of 48
At each occurrence of an SDOFS pulse, the DSP’s transmit
buffer contents are sent to the SDI pin of the AD73322L. This
also causes a subsequent DSP Tx interrupt which transfers the
initialization word, pointed to by the circular buffer pointer, to
the Tx buffer. The buffer pointer is updated to point to the next
unsent initialization word. When the circular buffer pointer
wraps around, which happens after the last word has been
accessed, it indicates that the initialization phase is complete.
This can be done manually in the DSP using a simple address
check, or autobuffered mode can be used to complete the
transfer automatically.
txcdat: ar = dm(stat_flag);
ar = pass ar;
if eq rti;
ena sec_reg;
ax0 = dm (i3, m1);
tx0 = ax0;
ax0 = i3;
ay0 = ^init_cmds;
ar = ax0 - ay0;
if gt rti;
ax0 = 0x00;
dm (stat_flag) = ax0;
rti;
In the main body of the program the code loops, waiting for the
initialization sequence to be completed.
check_init:
ax0 = dm (stat_flag);
af = pass ax0;
if ne jump check_init;
Because the AD73322L is effectively a cascade of two codec
units, it is important to observe the following restrictions in the
sequence of sending initialization words to the two codecs. It is
preferable to send pairs of control words for the corresponding
control registers in each codec, and it is essential to send the
control word for codec 2 before that for codec 1. Control
Registers A and B contain settings, such as sampling rate, serial
clock rate, etc., which critically require synchronous update in
both codecs.
Once the device has been initialized, Control Register A on
both codecs is written with a control word which changes the
operating mode from program mode to either data mode or
mixed control data mode. The device count field, which
defaults to 000b, must be programmed to 001b for a single
AD73322L device. In data mode or mixed mode, the main
function of the device is to return ADC samples from both
codecs and to accept DAC words for both codecs. During each
sample interval, two ADC samples are returned from the
device, while in the same interval two DAC update samples are
sent to the device. To reduce the number of interrupts and to
reduce complexity, autobuffering can be used to ensure that
only one interrupt is generated during each sampling interval.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD73322LARZ-REEL | 制造商:Analog Devices 功能描述:DUAL-CHANNEL, 3 V FRONT-END PROCESSOR FOR GENERAL PURPOSE - Tape and Reel |
| AD73322LAST | 制造商:Rochester Electronics LLC 功能描述:SPEECH AND TELEPHONY CODEC I.C. - Tape and Reel 制造商:Analog Devices 功能描述: |
| AD73322LAST-REEL | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 2DAC 16-Bit 44-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:SPEECH AND TELEPHONY CODEC I.C. - Tape and Reel |
| AD73322LASTZ | 制造商:Analog Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述: |
| AD73322LYR | 制造商:Rochester Electronics LLC 功能描述:SPEECH AND TELEPHONY CODEC I.C. - Bulk 制造商:Analog Devices 功能描述: |
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