VINH
參數(shù)資料
型號(hào)： AD73322LARUZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 41/43頁(yè)
文件大?。?/td> 0K
描述： IC PROCESSOR FRONTEND DL 28TSSOP
標(biāo)準(zhǔn)包裝： 50
位數(shù)： 16
通道數(shù)： 4
功率（瓦特）： 73mW
電壓 - 電源，模擬： 2.7 V ~ 5.5 V
電壓 - 電源，數(shù)字： 2.7 V ~ 5.5 V
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 管件
–7–
REV. B
AD73322
AD73322A
Parameter
Min
Typ
Max
Units
Test Conditions/Comments
LOGIC INPUTS
VINH, Input High Voltage
DVDD – 0.8
DVDD
V
VINL, Input Low Voltage
0
0.8
V
IIH, Input Current
±0.5
A
CIN, Input Capacitance
10
pF
LOGIC OUTPUT
VOH, Output High Voltage
DVDD – 0.4
DVDD
V
|IOUT| ≤ 100 A
VOL, Output Low Voltage
0
0.4
V
|IOUT| ≤ 100 A
Three-State Leakage Current
±0.3
A
POWER SUPPLIES
AVDD1, AVDD2
4.5
5.5
V
DVDD
4.5
5.5
V
IDD
10
See Table II
NOTES
1Operating temperature range is as follows: –40
°C to +85°C. Therefore, T
MIN = –40°C and TMAX = +85°C.
2Test conditions: Input PGA set for 0 dB gain, Output PGA set for 6 dB gain, no load on analog outputs (unless otherwise stated).
3At input to sigma-delta modulator of ADC.
4Guaranteed by design.
5Overall group delay will be affected by the sample rate and the external digital filtering.
6The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (3.3
× 1011)/DMCLK.
7Between VOUTP and VOUTN.
8At VOUT output.
9Frequency responses of ADC and DAC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB
preamplifier bypassed and input gain of 0 dB.
10Test conditions: no load on digital inputs, analog inputs ac coupled to ground, no load on analog outputs.
Specifications subject to change without notice.
Table II. Current Summary (AVDD = DVDD = +5.5 V)
Analog
Digital
Total Current
MCLK
Conditions
Current
(Typ)
SE
ON
Comments
ADCs On Only
7.5
9
16.5
1
YES
REFOUT Disabled
DACs On Only
16
9
25
1
YES
REFOUT Disabled
ADC and DAC On
20.5
10
30.5
1
YES
REFOUT Disabled
ADCs and DACs
and Input Amps On
27
10
37
1
YES
REFOUT Disabled
ADCs and DACs
and AGT On
25
10
35
1
YES
REFOUT Disabled
All Sections On
35
10
45
1
YES
REFCAP On Only
0.8
0
0.8
0
NO
REFOUT Disabled
REFCAP and
REFOUT On Only
3.5
0
3.5
0
NO
All Sections Off
0
3
0
YES
MCLK Active Levels Equal to 0 V and DVDD
All Sections Off
0
10
A
10
A
0
NO
Digital Inputs Static and Equal to 0 V or DVDD
The above values are in mA and are typical values unless otherwise noted.
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