參數(shù)資料
型號： AD73322LARUZ
廠商： Analog Devices Inc
文件頁數(shù)： 25/43頁
文件大?。?/td> 0K
描述： IC PROCESSOR FRONTEND DL 28TSSOP
標(biāo)準(zhǔn)包裝： 50
位數(shù)： 16
通道數(shù)： 4
功率（瓦特）： 73mW
電壓 - 電源，模擬： 2.7 V ~ 5.5 V
電壓 - 電源，數(shù)字： 2.7 V ~ 5.5 V
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 管件
AD73322
–31–
REV. B
The AD73322’s ADC inputs are biased about the internal refer-
ence level (REFCAP level), therefore it may be necessary to
bias external signals to this level using the buffered REFOUT
level as the reference. This is applicable in either dc- or ac-
coupled configurations. In the case of dc coupling, the signal
(biased to REFOUT) may be applied directly to the inputs
(using amplifier bypass), as shown in Figure 28, or it may be
conditioned in an external op amp where it can also be biased
to the reference level using the buffered REFOUT signal as
shown in Figure 29 or it is possible to connect inputs directly
to the AD73322’s input op amps as shown in Figure 30.
VFBN1
GAIN
1
VREF
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
REFOUT
REFERENCE
AD73322
VREF
50k
100pF
50k
100pF
50k
REFCAP
0.1 F
0/38dB
PGA
+6/–15dB
PGA
CONTINUOUS
TIME
LOW-PASS
FILTER
Figure 30. Analog Input (DC-Coupled) Using Internal
Amplifiers
In the case of ac coupling, a capacitor is used to couple the
signal to the input of the ADC. The ADC input must be biased
to the internal reference (REFCAP) level which is done by
connecting the input to the REFOUT pin through a 10 k
resistor as shown in Figure 31.
VFBN1
GAIN
1
VREF
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
REFOUT
REFERENCE
AD73322
VREF
100
0.1 F
REFCAP
0.1 F
0/38dB
PGA
0.047
F
0.047
F
10k
0.1 F
10k
+6/–15dB
PGA
CONTINUOUS
TIME
LOW-PASS
FILTER
Figure 31. Analog Input (AC-Coupled) Differential
If the ADC is being connected in single-ended mode, the
AD73322 should be programmed for single-ended mode using
the SEEN and INV bits of CRF and the inputs connected as
shown in Figure 32. When operated in single-ended input
mode, the AD73322 can multiplex one of the two inputs to the
ADC input.
VFBN1
GAIN
1
VREF
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
REFOUT
REFERENCE
0/38dB
PGA
AD73322
VREF
0.047
F
100
10k
0.1 F
REFCAP
0.1 F
+6/–15dB
PGA
CONTINUOUS
TIME
LOW-PASS
FILTER
Figure 32. Analog Input (AC-Coupled) Single-Ended
If best performance is required from a single-ended source, it
is possible to configure the AD73322’s input amplifiers as a
single-ended to differential converter as shown in Figure 33.
VFBN1
GAIN
1
VREF
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
REFOUT
REFERENCE
0/38dB
PGA
AD73322
50k
100pF
50k
100pF
50k
REFCAP
0.1 F
VREF
+6/–15dB
PGA
CONTINUOUS
TIME
LOW-PASS
FILTER
Figure 33. Single-Ended to Differential Conversion On
Analog Input
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD73322LARUZ-REEL 功能描述:IC PROCESSOR FRONTEND DL 28TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR)
AD73322LARZ 功能描述:IC ANALOG FRONT END DUAL 28-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR)
AD73322LARZ-REEL 制造商:Analog Devices 功能描述:DUAL-CHANNEL, 3 V FRONT-END PROCESSOR FOR GENERAL PURPOSE - Tape and Reel
AD73322LAST 制造商:Rochester Electronics LLC 功能描述:SPEECH AND TELEPHONY CODEC I.C. - Tape and Reel 制造商:Analog Devices 功能描述:
AD73322LAST-REEL 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 2DAC 16-Bit 44-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:SPEECH AND TELEPHONY CODEC I.C. - Tape and Reel
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