參數(shù)資料
型號(hào): AD7322BRU
廠商: Atmel Corp.
英文描述: Software Selectable True Bipolar Input, 2-Channel, 12-Bit Plus Sign ADC
中文描述: 軟件可選真雙極性輸入,2通道,12位ADC的加號(hào)
文件頁(yè)數(shù): 8/18頁(yè)
文件大小: 901K
代理商: AD7322BRU
AD7322
Preliminary Technical Data
MODES OF OPERATION
The AD7322 has a number of different modes of operation.
These modes are designed to provide flexible power
management options. These options can be chosen to optimize
the power dissipation/throughput rate ratio for the differing
application requirements. The mode of operation of the
AD7322 is controlled by the Power Management bits, PM1 and
PM0, in the Control register as detailed in
.The default
mode is Normal Mode, where all internal circuitry is fully
powered up.
Normal Mode (PM1 = PM0 = 0)
This mode is intended for the fastest throughput rate
performance, the AD7322 is fully powered up at all times.
shows the general diagram of operation of the
AD7322 in Normal Mode.
Figure 13. Normal Mode
The Conversion is initiated on the falling edge of CS and the
track and hold will enter hold mode as described in the Serial
Interface Section. The Data on the DIN line during the 16 SCLK
transfer will be loaded into one of the on-chip registers,
provided the Write bit is set. The register is selected by
programming the Register select bits, see Table 1 of the Register
section.
The AD7322 will remain fully powered up at the end of the
conversion provided both PM1 and PM0 contain 0 in the
control Register.
Sixteen serial clock cycles are required to complete the
conversion and access the conversion result. At the end of the
conversion CS may idle high until the next conversion or may
idle low until sometime prior to the next conversion.
Once the data transfer is complete, another conversion can be
initiated after the quiet time, tQUIET, has elapsed.
Full Shutdown Mode (PM1 = PM0 = 1)
In this mode all internal circuitry on the AD7322 is powered
down. The part retains information in the Registers during Full
Shut down. The AD7322 remains in Full shutdown mode until
the power managements bits in the Control Register, PM1 and
PM0, are changed.
If a write to the control register occurs while the part is in Full
Shut down mode, with the power management bits, PM1 and
PM0 set to 0, normal mode, the part will begin to power up on
the CS rising edge.
To ensure the AD7322 is fully powered up, tPOWER UP, should
elapse before the next CS falling edge.
Auto Shutdown Mode (PM1 = 1, PM0 = 0)
Once the Auto Shutdown mode is selected the AD7322 will
automatically enter shutdown at the end of each conversion.
The AD7322 retains information in the registers during
Shutdown. The track-and-hold is in hold during shutdown. On
the falling CS edge, the track-and-hold that was in hold during
shutdown will return to track.
The power-up from Auto Shutdown is TBD s
In this mode the power consumption of the AD7322 is greatly
reduced with the part entering shutdown at the end of each
conversion. When the control registers is programmed to move
into Auto Shutdown mode, it does so at the end of the
conversion.
Auto Standby Mode (PM1 = 0, PM0 =1)
In Auto Standby mode portions of the AD7322 are powered
down but the on-chip reference remains powered up. The
reference bit in the Control register should be 0 to ensure the
on-chip reference is enabled. This mode is similar to Auto
Shutdown but allows the AD7322 to power up much faster,
allowing faster throughput rates to be achieved.
The AD7322 will enter standby at the end of the conversion.
The part retains information in the Registers during Standby.
The AD7322 will remain in standby until it receives a CS falling
edge. The ADC will begin to power up on the CS falling edge.
On this CS falling edge the track-and-hold that was in hold
mode while the part was in Standby will return to track. Wake-
up time from Standby is 1 s. The user should ensure that 1 s
has elapsed before attempting a valid conversion. When running
the AD7322 with the maximum 20 MHz SCLK, one dummy
conversion of 16 x SCLKs is sufficient to power up the ADC.
This dummy conversion effectively halves the throughput rate
of the AD7322, with every second conversion result being a
valid result. Once Auto Standby mode is selected, the ADC can
move in and out of the low power state by controlling the CS
signal.
Rev. PrE | Page 16 of 18
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