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參數資料
| 型號： | AD7302BRUZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 2.7 V to 5.5 V, Parallel Input Dual Voltage Output 8-Bit DAC |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 1.2 us SETTLING TIME, 8-BIT DAC, PDSO20 |
| 封裝： | TSSOP-20 |
| 文件頁數： | 9/16頁 |
| 文件大?。?/td> | 292K |
| 代理商： | AD7302BRUZ |
–2–
REV. 0
AD7302–SPECIFICATIONS
(VDD = +2.7 V to +5.5 V, Internal Reference; CL = 100 pF, RL = 10 k
to VDD and GND;
to TMAX unless otherwise noted)
Parameter
B Versions1
Units
Conditions/Comments
STATIC PERFORMANCE
Resolution
8
Bits
Relative Accuracy
±1
LSB max
Note 2
Differential Nonlinearity
±1
LSB max
Guaranteed Monotonic
Full-Scale Error
–0.75
LSB typ
Zero Code Error @ 25
°C
3
LSB typ
All Zeroes Loaded to DAC Register
Gain Error3
±1
% FSR typ
Zero Code Temperature Coefficient
100
V/°C typ
DAC REFERENCE INPUT
REFIN Input Range
1.0 to VDD/2
V min to max
REFIN Input Impedance
10
M
typ
OUTPUT CHARACTERISTICS
Output Voltage Range
0 to VDD
V min to max
Output Voltage Settling Time
2
s max
Typically 1.2
s
Slew Rate
7.5
V/
s typ
Digital to Analog Glitch Impulse
1
nV-s typ
1 LSB Change Around Major Carry
Digital Feedthrough
0.2
nV-s typ
Digital Crosstalk
0.2
nV-s typ
Analog Crosstalk
±0.2
LSB typ
DC Output Impedance
40
typ
Short Circuit Current
14
mA typ
Power Supply Rejection Ratio
4
0.0003
%/% max
V
DD =
±10%
LOGIC INPUTS
Input Current
±10
A max
VINL, Input Low Voltage
0.8
V max
VDD = +5 V
VINL, Input Low Voltage
0.6
V max
VDD = +3 V
VINH, Input High Voltage
2.4
V min
VDD = +5 V
VINH, Input High Voltage
2.1
V min
VDD = +3 V
Pin Capacitance
7
pF max
POWER REQUIREMENTS
VDD
2.7/5.5
V min/max
IDD
Both DACs Active and Excluding Load Currents
VDD = 3.3 V
VIH = VDD and VIL = GND
@ 25
°C
2.8
mA max
Typically 2.3 mA
@ TMIN to TMAX
3
mA max
See Figures 6 and 7
VDD = 5.5 V
VIH = VDD and VIL = GND
@ 25
°C
4.5
mA max
Typically 2.8 mA
@ TMIN to TMAX
5
mA max
See Figures 6 and 7
IDD (Full Power-Down)
@ 25
°C1
A max
VIH = VDD and VIL = GND
TMIN to TMAX
2
A max
See Figure 18
NOTES
1Temperature ranges are as follows: B Version: –40
°C to +105°C.
2Relative Accuracy is calculated using a reduced code range of 15 to 245.
3Gain error is specified between Codes 15 and 245. The actual error at Code 15 is typically 3 LSB.
4Guaranteed by characterization at product release, not production tested.
Specifications subject to change without notice.
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