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參數(shù)資料
| 型號： | AD723ARUZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/20頁 |
| 文件大小： | 0K |
| 描述： | IC ENCODER RGB-NTSC/PAL 28-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 視頻編碼器 |
| 應(yīng)用： | 照相機(jī)，互聯(lián)網(wǎng)設(shè)備，機(jī)頂盒 |
| 電壓 - 電源，數(shù)字： | 2.7 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 帶卷 (TR) |
REV. 0
AD723
–4–
APOS
AGND
APOS
DPOS
DGND
POS
APOS
AGND
APOS
DGND
DPOS
TGND
1k
19
24
26
27
20
23
18
10
11
9
6
7
5
2
3
1
16
17
15
4
21
PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Description
Equivalent Circuit
1
STND
Encoding Standard Pin. A Logic HIGH signal is used for NTSC encoding, a Logic LOW
Circuit A
signal signifies PAL.
2
SA
When SA is high, phase alternation accompanies NTSC bandwidths and timing for
Circuit A
support of PAL (M) and “combination N” standards used in South America.
3
CE
Chip Enable. A Logic HIGH input enables the encode function. A Logic LOW input
Circuit A
powers down the chip when not in use. Requires active HSYNC signal to activate.
Can be raised briefly to perform power-down load check.
4
TERM
Terminate. A Logic HIGH enables terminate function. RT, GT, and BT terminals are
Circuit A
tied to the termination ground, TGND. A Logic Low leaves these terminals floating.
5
RIN
Red Component Video Input. 0 mV to 714 mV ac-coupled.
Circuit B
6
GIN
Green Component Video Input. 0 mV to 714 mV ac-coupled.
Circuit B
7
BIN
Blue Component Video Input. 0 mV to 714 mV ac-coupled.
Circuit B
8
AGND
Analog Ground Connection. (Main Ground Connection.)
9
RT
Input Terminal for RED Termination Switch. Can be left unconnected when switchable
Circuit F
input termination option is not used.
10
GT
Input Terminal for GREEN Termination Switch. Can be left unconnected when switchable Circuit F
input termination option is not used.
11
BT
Input Terminal for BLUE Termination Switch. Can be left unconnected when switchable
Circuit F
input termination option is not used.
12
TGND
Termination Switch Ground Connection.
13
DVDD
Digital Positive Supply Connection.
14
DGND
Digital Ground Connection.
15
HSYNC
Horizontal Sync Signal (or CSYNC signal).
Circuit A
16
VSYNC
Vertical Sync Signal.
Circuit A
17
4FSC
4FSC Clock Input. For NTSC: 14.318 180 MHz, for PAL: 17.734 475 MHz.
Circuit A
18
TVDET
Output Flag for TV Presence Detection. LOW signal signifies no TV present.
Circuit E
19
CVSET
Composite Video Gain Setting Resistor.
Circuit C
20
CV
Composite Video Output.
Circuit C
21
YTRAP
Luminance Trap Filter Tap. Attach L-C resonant network to reduce cross-color artifacts.
Circuit D
22
AVDD
Analog Positive Supply Connection.
23
C
Chrominance Output.
Circuit C
24
CSET
Chrominance Gain Setting Resistor.
Circuit C
25
AVDD1
Analog Positive Supply Connection.
26
Y
Luminance Output (with CSYNC).
Circuit C
27
YSET
Luminance Gain Setting Resistor.
Circuit C
28
AGND
Analog Ground Connection.
Figure 1. Equivalent Circuits
Circuit A
Circuit B
Circuit C
Circuit D
Circuit E
Circuit F
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